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Update VCU118 XDC

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This commit is contained in:
Alex Forencich 2020-10-06 00:41:45 -07:00
parent 5ecfe4bcca
commit 993a712f01
3 changed files with 15 additions and 15 deletions
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10
fpga/mqnic/VCU118/fpga_100g/fpga.xdc
View File

@ -244,10 +244,10 @@ set_property -dict {LOC AM17 IOSTANDARD LVCMOS18 PULLUP true} [get_ports pcie_re
create_clock -period 10 -name pcie_mgt_refclk_2 [get_ports pcie_refclk_2_p]
# Flash
set_property -dict {LOC AM19 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[0]}]
set_property -dict {LOC AM18 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[1]}]
set_property -dict {LOC AN20 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[2]}]
set_property -dict {LOC AP20 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[3]}]
set_property -dict {LOC BF16 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_cs}]
set_property -dict {LOC AM19 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[0]}]
set_property -dict {LOC AM18 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[1]}]
set_property -dict {LOC AN20 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[2]}]
set_property -dict {LOC AP20 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[3]}]
set_property -dict {LOC BF16 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_cs}]

10
fpga/mqnic/VCU118/fpga_10g/fpga.xdc
View File

@ -244,10 +244,10 @@ set_property -dict {LOC AM17 IOSTANDARD LVCMOS18 PULLUP true} [get_ports pcie_re
create_clock -period 10 -name pcie_mgt_refclk_2 [get_ports pcie_refclk_2_p]
# Flash
set_property -dict {LOC AM19 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[0]}]
set_property -dict {LOC AM18 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[1]}]
set_property -dict {LOC AN20 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[2]}]
set_property -dict {LOC AP20 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[3]}]
set_property -dict {LOC BF16 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_cs}]
set_property -dict {LOC AM19 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[0]}]
set_property -dict {LOC AM18 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[1]}]
set_property -dict {LOC AN20 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[2]}]
set_property -dict {LOC AP20 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[3]}]
set_property -dict {LOC BF16 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_cs}]

10
fpga/mqnic_tdma/VCU118/fpga_10g/fpga.xdc
View File

@ -244,10 +244,10 @@ set_property -dict {LOC AM17 IOSTANDARD LVCMOS18 PULLUP true} [get_ports pcie_re
create_clock -period 10 -name pcie_mgt_refclk_2 [get_ports pcie_refclk_2_p]
# Flash
set_property -dict {LOC AM19 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[0]}]
set_property -dict {LOC AM18 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[1]}]
set_property -dict {LOC AN20 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[2]}]
set_property -dict {LOC AP20 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_dq[3]}]
set_property -dict {LOC BF16 IOSTANDARD LVCMOS18 DRIVE 16} [get_ports {qspi_1_cs}]
set_property -dict {LOC AM19 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[0]}]
set_property -dict {LOC AM18 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[1]}]
set_property -dict {LOC AN20 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[2]}]
set_property -dict {LOC AP20 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_dq[3]}]
set_property -dict {LOC BF16 IOSTANDARD LVCMOS18 DRIVE 12} [get_ports {qspi_1_cs}]