diff --git a/utils/mqnic-dump.c b/utils/mqnic-dump.c
index 5813d024d..b9c95c6d0 100644
--- a/utils/mqnic-dump.c
+++ b/utils/mqnic-dump.c
@@ -224,6 +224,25 @@ int main(int argc, char *argv[])
         printf("RXCQ %4d  0x%016lx  %d  %2d  %d %d  %4d  %6d  %6d  %6d\n", k, base_addr, active, log_size, armed, continuous, interrupt_index, head_ptr, tail_ptr, occupancy);
     }
 
+    printf("Event queue info\n");
+    printf(" Queue      Base Address     E  LS  A C   Int    Head    Tail     Len\n");
+    for (int k = 0; k < dev_interface->event_queue_count; k++)
+    {
+        volatile uint8_t *base = dev_interface->regs+dev_interface->event_queue_offset+k*MQNIC_CPL_QUEUE_STRIDE;
+
+        uint64_t base_addr = (uint64_t)mqnic_reg_read32(base, MQNIC_CPL_QUEUE_BASE_ADDR_REG) + ((uint64_t)mqnic_reg_read32(base, MQNIC_CPL_QUEUE_BASE_ADDR_REG+4) << 32);
+        uint8_t active = (mqnic_reg_read32(base, MQNIC_CPL_QUEUE_ACTIVE_LOG_SIZE_REG) & MQNIC_CPL_QUEUE_ACTIVE_MASK) != 0;
+        uint8_t log_size = mqnic_reg_read32(base, MQNIC_CPL_QUEUE_ACTIVE_LOG_SIZE_REG) & 0xff;
+        uint8_t armed = (mqnic_reg_read32(base, MQNIC_CPL_QUEUE_INTERRUPT_INDEX_REG) & MQNIC_CPL_QUEUE_ARM_MASK) != 0;
+        uint8_t continuous = (mqnic_reg_read32(base, MQNIC_CPL_QUEUE_INTERRUPT_INDEX_REG) & MQNIC_CPL_QUEUE_CONT_MASK) != 0;
+        uint32_t interrupt_index = mqnic_reg_read32(base, MQNIC_CPL_QUEUE_INTERRUPT_INDEX_REG) & 0xffff;
+        uint32_t head_ptr = mqnic_reg_read32(base, MQNIC_CPL_QUEUE_HEAD_PTR_REG);
+        uint32_t tail_ptr = mqnic_reg_read32(base, MQNIC_CPL_QUEUE_TAIL_PTR_REG);
+        uint32_t occupancy = (head_ptr - tail_ptr) & 0xffff;
+
+        printf("EQ %4d  0x%016lx  %d  %2d  %d %d  %4d  %6d  %6d  %6d\n", k, base_addr, active, log_size, armed, continuous, interrupt_index, head_ptr, tail_ptr, occupancy);
+    }
+
     for (int k = 0; k < dev_port->sched_count; k++)
     {
         printf("Port %d scheduler %d\n", port, k);