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synced 2025-01-16 08:12:53 +08:00
Update testbenches for new version of cocotbext-pcie
This commit is contained in:
parent
21b0f014a5
commit
a5d7833bd9
@ -82,8 +82,10 @@ class TB(object):
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# pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -82,8 +82,10 @@ class TB(object):
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# pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -82,8 +82,10 @@ class TB(object):
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# pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -82,8 +82,10 @@ class TB(object):
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# pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,7 +81,7 @@ class TB(object):
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pcie_link_width=8,
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user_clk_frequency=250e6,
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alignment="dword",
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straddle=False,
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rc_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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enable_client_tag=True,
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@ -81,7 +81,7 @@ class TB(object):
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pcie_link_width=8,
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user_clk_frequency=250e6,
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alignment="dword",
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straddle=False,
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rc_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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enable_client_tag=True,
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@ -81,7 +81,7 @@ class TB(object):
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pcie_link_width=8,
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user_clk_frequency=250e6,
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alignment="dword",
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straddle=False,
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rc_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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enable_client_tag=True,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=8,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=8,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,7 +81,7 @@ class TB(object):
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pcie_link_width=8,
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user_clk_frequency=250e6,
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alignment="dword",
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straddle=False,
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rc_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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enable_client_tag=True,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=4,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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@ -81,8 +81,10 @@ class TB(object):
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pcie_link_width=16,
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user_clk_frequency=250e6,
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alignment="dword",
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cq_cc_straddle=False,
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rq_rc_straddle=False,
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cq_straddle=False,
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cc_straddle=False,
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rq_straddle=False,
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rc_straddle=False,
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rc_4tlp_straddle=False,
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pf_count=1,
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max_payload_size=1024,
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