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Change board IDs

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This commit is contained in:
Alex Forencich 2019-07-21 15:27:01 -07:00
parent 851eb2f25e
commit a6c4b8b1b7
5 changed files with 6 additions and 6 deletions
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2
fpga/mqnic/ADM_PCIE_9V3/fpga_10g/rtl/fpga_core.v
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@ -277,7 +277,7 @@ parameter PTP_PERIOD_FNS = 32'd0;
// FW and board IDs
parameter FW_ID = 32'd0;
parameter FW_VER = {16'd0, 16'd1};
parameter BOARD_ID = {16'h4144, 16'h0001};
parameter BOARD_ID = {16'h4144, 16'h9003};
parameter BOARD_VER = {16'd0, 16'd1};
// Structural parameters

2
fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v
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@ -215,7 +215,7 @@ parameter PTP_PERIOD_FNS = 32'd0;
// FW and board IDs
parameter FW_ID = 32'd0;
parameter FW_VER = {16'd0, 16'd1};
parameter BOARD_ID = {16'h1ce4, 16'h0001};
parameter BOARD_ID = {16'h1ce4, 16'h800a};
parameter BOARD_VER = {16'd0, 16'd1};
// Structural parameters

2
fpga/mqnic_tdma/ADM_PCIE_9V3/fpga_10g/rtl/fpga_core.v
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@ -277,7 +277,7 @@ parameter PTP_PERIOD_FNS = 32'd0;
// FW and board IDs
parameter FW_ID = 32'd0;
parameter FW_VER = {16'd0, 16'd1};
parameter BOARD_ID = {16'h4144, 16'h0001};
parameter BOARD_ID = {16'h4144, 16'h9003};
parameter BOARD_VER = {16'd0, 16'd1};
// Structural parameters

2
fpga/mqnic_tdma/ExaNIC_X10/fpga/rtl/fpga_core.v
View File

@ -215,7 +215,7 @@ parameter PTP_PERIOD_FNS = 32'd0;
// FW and board IDs
parameter FW_ID = 32'd0;
parameter FW_VER = {16'd0, 16'd1};
parameter BOARD_ID = {16'h1ce4, 16'h0001};
parameter BOARD_ID = {16'h1ce4, 16'h800a};
parameter BOARD_VER = {16'd0, 16'd1};
// Structural parameters

4
modules/mqnic/mqnic_hw.h
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@ -42,8 +42,8 @@ either expressed or implied, of The Regents of the University of California.
#define MQNIC_MAX_RX_RINGS 256
#define MQNIC_MAX_RX_CPL_RINGS 256
#define MQNIC_BOARD_ID_EXANIC_X10 0x1ce40001
#define MQNIC_BOARD_ID_ADM_PCIE_9V3 0x41440001
#define MQNIC_BOARD_ID_EXANIC_X10 0x1ce4800a
#define MQNIC_BOARD_ID_ADM_PCIE_9V3 0x41449003
// NIC CSRs
#define MQNIC_REG_FW_ID 0x0000