FPGA/corundum
1
0
Fork 0
mirror of https://github.com/corundum/corundum.git synced 2025-01-16 08:12:53 +08:00
Code Issues Projects Releases Wiki Activity

fpga/mqnic: Fix default class code for UltraScale and 7-series devices

Browse Source 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2022-12-03 15:33:52 -08:00
parent 5d1df56706
commit ad18c19da9
3 changed files with 9 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
fpga/mqnic/NetFPGA_SUME/fpga/ip/pcie3_7x_0.tcl
View File

@ -12,7 +12,9 @@ set_property -dict [list \
CONFIG.extended_tag_field {true} \
CONFIG.pf0_dev_cap_max_payload {1024_bytes} \
CONFIG.axisten_freq {250} \
CONFIG.PF0_CLASS_CODE {020000} \
CONFIG.pf0_class_code_base {02} \
CONFIG.pf0_class_code_sub {00} \
CONFIG.pf0_class_code_interface {00} \
CONFIG.PF0_DEVICE_ID {1001} \
CONFIG.PF0_SUBSYSTEM_ID {7028} \
CONFIG.PF0_SUBSYSTEM_VENDOR_ID {10ee} \

4
fpga/mqnic/Nexus_K35_S/fpga/ip/pcie3_ultrascale_0.tcl
View File

@ -10,7 +10,9 @@ set_property -dict [list \
CONFIG.extended_tag_field {true} \
CONFIG.pf0_dev_cap_max_payload {1024_bytes} \
CONFIG.axisten_freq {250} \
CONFIG.PF0_CLASS_CODE {020000} \
CONFIG.pf0_class_code_base {02} \
CONFIG.pf0_class_code_sub {00} \
CONFIG.pf0_class_code_interface {00} \
CONFIG.PF0_DEVICE_ID {1001} \
CONFIG.PF0_SUBSYSTEM_ID {0003} \
CONFIG.PF0_SUBSYSTEM_VENDOR_ID {1ce4} \

4
fpga/mqnic/VCU108/fpga_25g/ip/pcie3_ultrascale_0.tcl
View File

@ -9,7 +9,9 @@ set_property -dict [list \
CONFIG.extended_tag_field {true} \
CONFIG.pf0_dev_cap_max_payload {1024_bytes} \
CONFIG.axisten_freq {250} \
CONFIG.PF0_CLASS_CODE {020000} \
CONFIG.pf0_class_code_base {02} \
CONFIG.pf0_class_code_sub {00} \
CONFIG.pf0_class_code_interface {00} \
CONFIG.PF0_DEVICE_ID {1001} \
CONFIG.PF0_SUBSYSTEM_ID {806c} \
CONFIG.PF0_SUBSYSTEM_VENDOR_ID {10ee} \