Rename HXT100G to HTG-640

Signed-off-by: Alex Forencich <alex@alexforencich.com>

README.md

@@ -46,7 +46,7 @@ following boards:
 *  Exablaze ExaNIC X10 (Xilinx Kintex UltraScale XCKU035)
 *  Exablaze ExaNIC X25 (Xilinx Kintex UltraScale+ XCKU3P)
 *  HiTech Global HTG-9200 (Xilinx UltraScale+ XCVU9P)
-*  HiTech Global HTG-V6HXT-100GIG-565 (Xilinx Virtex 6 XC6VHX565T)
+*  HiTech Global HTG-640 (HTG-V6HXT-100GIG-565) (Xilinx Virtex 6 XC6VHX565T)
 *  Silicom fb2CG@KU15P (Xilinx Kintex UltraScale+ XCKU15P)
 *  Xilinx KC705 (Xilinx Kintex 7 XC7K325T)
 *  Xilinx ML605 (Xilinx Virtex 6 XC6VLX240T)

example/HTG640/fpga/README.md

@@ -1,8 +1,8 @@
-# Verilog Ethernet HXT100G Example Design
+# Verilog Ethernet HTG-640 Example Design
 
 ## Introduction
 
-This example design targets the HiTech Global HXT100G FPGA board.
+This example design targets the HiTech Global HTG-640 (HTG-V6HXT-100GIG-565) FPGA board.
 
 The design by default listens to UDP port 1234 at IP address 192.168.1.128 and
 will echo back any packets received.  The design will also respond correctly
@@ -18,7 +18,7 @@ in PATH.
 
 ## How to test
 
-Run make program to program the HXT100G board with the Xilinx Impact software.
+Run make program to program the HTG-640 board with the Xilinx Impact software.
 Then run
 
     netcat -u 192.168.1.128 1234

example/HTG640/fpga_cxpt16/README.md

@@ -1,8 +1,8 @@
-# Verilog Ethernet HXT100G Crosspoint Switch Design
+# Verilog Ethernet HTG-640 Crosspoint Switch Design
 
 ## Introduction
 
-This design targets the HiTech Global HXT100G FPGA board.
+This design targets the HiTech Global HTG-640 (HTG-V6HXT-100GIG-565) FPGA board.
 
 The design forms a 16x16 crosspoint switch for 10G Ethernet.  It is capable of
 connecting any output port to any input port based on configuration frames