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Rename int_index to eq_index
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@ -175,7 +175,7 @@ struct mqnic_cq_ring {
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struct net_device *ndev;
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struct napi_struct napi;
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int ring_index;
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int int_index;
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int eq_index;
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void (*handler) (struct mqnic_cq_ring *);
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@ -306,7 +306,7 @@ void mqnic_process_eq(struct net_device *ndev, struct mqnic_eq_ring *eq_ring);
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// mqnic_cq.c
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int mqnic_create_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring **ring_ptr, int size, int stride, int index, u8 __iomem *hw_addr);
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void mqnic_destroy_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring **ring_ptr);
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int mqnic_activate_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring *ring, int int_index);
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int mqnic_activate_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring *ring, int eq_index);
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void mqnic_deactivate_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring *ring);
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bool mqnic_is_cq_ring_empty(const struct mqnic_cq_ring *ring);
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bool mqnic_is_cq_ring_full(const struct mqnic_cq_ring *ring);
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@ -103,9 +103,9 @@ void mqnic_destroy_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring **ring_
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kfree(ring);
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}
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int mqnic_activate_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring *ring, int int_index)
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int mqnic_activate_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring *ring, int eq_index)
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{
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ring->int_index = int_index;
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ring->eq_index = eq_index;
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// deactivate queue
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iowrite32(0, ring->hw_addr+MQNIC_CPL_QUEUE_ACTIVE_LOG_SIZE_REG);
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@ -113,7 +113,7 @@ int mqnic_activate_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring *ring,
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iowrite32(ring->buf_dma_addr, ring->hw_addr+MQNIC_CPL_QUEUE_BASE_ADDR_REG+0);
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iowrite32(ring->buf_dma_addr >> 32, ring->hw_addr+MQNIC_CPL_QUEUE_BASE_ADDR_REG+4);
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// set interrupt index
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iowrite32(int_index, ring->hw_addr+MQNIC_CPL_QUEUE_INTERRUPT_INDEX_REG);
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iowrite32(eq_index, ring->hw_addr+MQNIC_CPL_QUEUE_INTERRUPT_INDEX_REG);
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// set pointers
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iowrite32(ring->head_ptr & ring->hw_ptr_mask, ring->hw_addr+MQNIC_CPL_QUEUE_HEAD_PTR_REG);
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iowrite32(ring->tail_ptr & ring->hw_ptr_mask, ring->hw_addr+MQNIC_CPL_QUEUE_TAIL_PTR_REG);
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@ -128,7 +128,7 @@ void mqnic_deactivate_cq_ring(struct mqnic_priv *priv, struct mqnic_cq_ring *rin
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// deactivate queue
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iowrite32(ilog2(ring->size), ring->hw_addr+MQNIC_CPL_QUEUE_ACTIVE_LOG_SIZE_REG);
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// disarm queue
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iowrite32(ring->int_index, ring->hw_addr+MQNIC_CPL_QUEUE_INTERRUPT_INDEX_REG);
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iowrite32(ring->eq_index, ring->hw_addr+MQNIC_CPL_QUEUE_INTERRUPT_INDEX_REG);
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}
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bool mqnic_is_cq_ring_empty(const struct mqnic_cq_ring *ring)
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@ -153,6 +153,6 @@ void mqnic_cq_write_tail_ptr(struct mqnic_cq_ring *ring)
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void mqnic_arm_cq(struct mqnic_cq_ring *ring)
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{
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iowrite32(ring->int_index | MQNIC_CPL_QUEUE_ARM_MASK, ring->hw_addr+MQNIC_CPL_QUEUE_INTERRUPT_INDEX_REG);
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iowrite32(ring->eq_index | MQNIC_CPL_QUEUE_ARM_MASK, ring->hw_addr+MQNIC_CPL_QUEUE_INTERRUPT_INDEX_REG);
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}
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