FPGA/corundum
1
0
Fork 0
mirror of https://github.com/corundum/corundum.git synced 2025-01-16 08:12:53 +08:00
Code Issues Projects Releases Wiki Activity

fpga/common/tb: Fix testbench name

Browse Source 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2023-06-24 00:57:02 -07:00
parent a7e4c9e6eb
commit b84b6b53cc
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
fpga/common/tb/mqnic_core_axi/test_mqnic_core_axi.py
View File

@ -545,7 +545,7 @@ pcie_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'pcie', 'rtl'))
(1, 2, 128, 64, 64, 1),
(1, 1, 128, 64, 128, 1),
])
def test_mqnic_core_pcie_axi(request, if_count, ports_per_if, axi_data_width,
def test_mqnic_core_axi(request, if_count, ports_per_if, axi_data_width,
axis_data_width, axis_sync_data_width, ptp_ts_enable):
dut = "mqnic_core_axi"
module = os.path.splitext(os.path.basename(__file__))[0]