From c04ba2de2ea4c123393fb6439310b9cbdeba2e37 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Tue, 29 Sep 2020 17:30:42 -0700 Subject: [PATCH] Fix flash settings --- example/AU200/fpga_axi/fpga.xdc | 1 - example/AU250/fpga_axi/fpga.xdc | 1 - 2 files changed, 2 deletions(-) diff --git a/example/AU200/fpga_axi/fpga.xdc b/example/AU200/fpga_axi/fpga.xdc index 1e053f8ae..b6d0a6de6 100644 --- a/example/AU200/fpga_axi/fpga.xdc +++ b/example/AU200/fpga_axi/fpga.xdc @@ -11,7 +11,6 @@ set_property BITSTREAM.CONFIG.CONFIGRATE 63.8 [current_design] set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] -set_property BITSTREAM.CONFIG.SPI_OPCODE 8'h6B [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] # System clocks diff --git a/example/AU250/fpga_axi/fpga.xdc b/example/AU250/fpga_axi/fpga.xdc index 80534d1cd..5f92fd5c3 100644 --- a/example/AU250/fpga_axi/fpga.xdc +++ b/example/AU250/fpga_axi/fpga.xdc @@ -11,7 +11,6 @@ set_property BITSTREAM.CONFIG.CONFIGRATE 63.8 [current_design] set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] -set_property BITSTREAM.CONFIG.SPI_OPCODE 8'h6B [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] # System clocks