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Fix unaligned backpressure issue in AXI DMA write module

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This commit is contained in:
Alex Forencich 2020-11-14 20:12:24 -08:00
parent 0eda0767af
commit c7d74b6425
1 changed files with 1 additions and 1 deletions
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rtl/axi_dma_wr.v
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@ -326,7 +326,7 @@ always @* begin
shift_axis_tkeep = {s_axis_write_data_tkeep, save_axis_tkeep_reg} >> (AXIS_KEEP_WIDTH_INT-offset_reg);
shift_axis_tvalid = s_axis_write_data_tvalid;
shift_axis_tlast = (s_axis_write_data_tlast && ((s_axis_write_data_tkeep & ({AXIS_KEEP_WIDTH_INT{1'b1}} << (AXIS_KEEP_WIDTH_INT-offset_reg))) == 0));
shift_axis_input_tready = 1'b1;
shift_axis_input_tready = !(s_axis_write_data_tlast && s_axis_write_data_tready && s_axis_write_data_tvalid);
end
end