FPGA/corundum
1
0
Fork 0
mirror of https://github.com/corundum/corundum.git synced 2025-01-16 08:12:53 +08:00
Code Issues Projects Releases Wiki Activity

Match width

Browse Source
This commit is contained in:
Alex Forencich 2018-12-09 00:04:30 -08:00
parent aa6991a4a5
commit cadd1bcb50
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
rtl/axis_demux.v
View File

@ -212,7 +212,7 @@ always @* begin
end else if (m_axis_tready & m_axis_tvalid) begin
// input is not ready, but output is ready
m_axis_tvalid_next = temp_m_axis_tvalid_reg;
temp_m_axis_tvalid_next = 1'b0;
temp_m_axis_tvalid_next = {M_COUNT{1'b0}};
store_axis_temp_to_output = 1'b1;
end
end
@ -221,7 +221,7 @@ always @(posedge clk) begin
if (rst) begin
m_axis_tvalid_reg <= {M_COUNT{1'b0}};
m_axis_tready_int_reg <= 1'b0;
temp_m_axis_tvalid_reg <= 1'b0;
temp_m_axis_tvalid_reg <= {M_COUNT{1'b0}};
end else begin
m_axis_tvalid_reg <= m_axis_tvalid_next;
m_axis_tready_int_reg <= m_axis_tready_int_early;