From cc99484d99d33f6ea2bc1978b82609c3694ce183 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Wed, 3 Aug 2022 23:04:23 -0700 Subject: [PATCH] fpga/common: add missing parameter Signed-off-by: Alex Forencich --- fpga/common/rtl/mqnic_core_axi.v | 2 ++ 1 file changed, 2 insertions(+) diff --git a/fpga/common/rtl/mqnic_core_axi.v b/fpga/common/rtl/mqnic_core_axi.v index 903b317cf..fcd994d5e 100644 --- a/fpga/common/rtl/mqnic_core_axi.v +++ b/fpga/common/rtl/mqnic_core_axi.v @@ -66,6 +66,7 @@ module mqnic_core_axi # parameter PTP_CLOCK_PIPELINE = 0, parameter PTP_CLOCK_CDC_PIPELINE = 0, parameter PTP_USE_SAMPLE_CLOCK = 0, + parameter PTP_SEPARATE_TX_CLOCK = 0, parameter PTP_SEPARATE_RX_CLOCK = 0, parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 0, @@ -825,6 +826,7 @@ mqnic_core #( .PTP_CLOCK_PIPELINE(PTP_CLOCK_PIPELINE), .PTP_CLOCK_CDC_PIPELINE(PTP_CLOCK_CDC_PIPELINE), .PTP_USE_SAMPLE_CLOCK(PTP_USE_SAMPLE_CLOCK), + .PTP_SEPARATE_TX_CLOCK(PTP_SEPARATE_TX_CLOCK), .PTP_SEPARATE_RX_CLOCK(PTP_SEPARATE_RX_CLOCK), .PTP_PORT_CDC_PIPELINE(PTP_PORT_CDC_PIPELINE), .PTP_PEROUT_ENABLE(PTP_PEROUT_ENABLE),