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Drop entire write operation on address decode fail in axi_interconnect
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@ -646,7 +646,7 @@ always @* begin
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axi_addr_valid_next = 1'b0;
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if (current_s_axi_wready && current_s_axi_wvalid) begin
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if (current_s_axi_wready && current_s_axi_wvalid && current_s_axi_wlast) begin
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s_axi_wready_next[s_select] = 1'b0;
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s_axi_bvalid_next[s_select] = 1'b1;
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state_next = STATE_WAIT_IDLE;
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