From d730369671fae10c8a7f639ad806586872f5c948 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Fri, 23 Jun 2023 02:39:22 -0700 Subject: [PATCH] Use correct offsets in testbench Signed-off-by: Alex Forencich --- .../example_core_pcie_ptile/test_example_core_pcie_ptile.py | 4 ++-- .../tb/example_core_pcie_s10/test_example_core_pcie_s10.py | 4 ++-- .../tb/example_core_pcie_us/test_example_core_pcie_us.py | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/example/common/tb/example_core_pcie_ptile/test_example_core_pcie_ptile.py b/example/common/tb/example_core_pcie_ptile/test_example_core_pcie_ptile.py index 5fe252662..b32fb3a70 100644 --- a/example/common/tb/example_core_pcie_ptile/test_example_core_pcie_ptile.py +++ b/example/common/tb/example_core_pcie_ptile/test_example_core_pcie_ptile.py @@ -590,14 +590,14 @@ async def run_test(dut): size = 8+64 stride = 0 for count in range(8, 256+1, 8): - await dma_cpl_buf_test(tb, dev, mem_base, region_len-1, size, stride, count, 2000) + await dma_cpl_buf_test(tb, dev, mem_base+128-8, region_len-1, size, stride, count, 2000) tb.log.info("Test RX completion buffer (CPLH, 8+128+8)") size = 8+128+8 stride = 0 for count in range(8, 256+1, 8): - await dma_cpl_buf_test(tb, dev, mem_base, region_len-1, size, stride, count, 2000) + await dma_cpl_buf_test(tb, dev, mem_base+128-8, region_len-1, size, stride, count, 2000) tb.log.info("Test RX completion buffer (CPLD)") diff --git a/example/common/tb/example_core_pcie_s10/test_example_core_pcie_s10.py b/example/common/tb/example_core_pcie_s10/test_example_core_pcie_s10.py index 42ecf1924..eb5a2385b 100644 --- a/example/common/tb/example_core_pcie_s10/test_example_core_pcie_s10.py +++ b/example/common/tb/example_core_pcie_s10/test_example_core_pcie_s10.py @@ -538,14 +538,14 @@ async def run_test(dut): size = 8+64 stride = 0 for count in range(8, 256+1, 8): - await dma_cpl_buf_test(tb, dev, mem_base, region_len-1, size, stride, count, 2000) + await dma_cpl_buf_test(tb, dev, mem_base+128-8, region_len-1, size, stride, count, 2000) tb.log.info("Test RX completion buffer (CPLH, 8+128+8)") size = 8+128+8 stride = 0 for count in range(8, 256+1, 8): - await dma_cpl_buf_test(tb, dev, mem_base, region_len-1, size, stride, count, 2000) + await dma_cpl_buf_test(tb, dev, mem_base+128-8, region_len-1, size, stride, count, 2000) tb.log.info("Test RX completion buffer (CPLD)") diff --git a/example/common/tb/example_core_pcie_us/test_example_core_pcie_us.py b/example/common/tb/example_core_pcie_us/test_example_core_pcie_us.py index 68775d8e1..248c279e4 100644 --- a/example/common/tb/example_core_pcie_us/test_example_core_pcie_us.py +++ b/example/common/tb/example_core_pcie_us/test_example_core_pcie_us.py @@ -631,14 +631,14 @@ async def run_test(dut): size = 8+64 stride = 0 for count in range(8, 256+1, 8): - await dma_cpl_buf_test(tb, dev, mem_base, region_len-1, size, stride, count, 2000) + await dma_cpl_buf_test(tb, dev, mem_base+128-8, region_len-1, size, stride, count, 2000) tb.log.info("Test RX completion buffer (CPLH, 8+128+8)") size = 8+128+8 stride = 0 for count in range(8, 256+1, 8): - await dma_cpl_buf_test(tb, dev, mem_base, region_len-1, size, stride, count, 2000) + await dma_cpl_buf_test(tb, dev, mem_base+128-8, region_len-1, size, stride, count, 2000) tb.log.info("Test RX completion buffer (CPLD)")