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modules/mqnic: Consistent naming of driver functions and structs

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2022-04-24 23:01:15 -07:00
parent cc9d445005
commit e4de3c2fb5
9 changed files with 70 additions and 70 deletions
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42
modules/mqnic/mqnic.h
View File

@ -73,7 +73,7 @@ extern unsigned int mqnic_num_rx_queue_entries;
struct mqnic_dev;
struct mqnic_if;
struct reg_block {
struct mqnic_reg_block {
u32 type;
u32 version;
u8 __iomem *regs;
@ -159,10 +159,10 @@ struct mqnic_dev {
struct mqnic_adev *app_adev;
#endif
struct reg_block *rb_list;
struct reg_block *fw_id_rb;
struct reg_block *if_rb;
struct reg_block *phc_rb;
struct mqnic_reg_block *rb_list;
struct mqnic_reg_block *fw_id_rb;
struct mqnic_reg_block *if_rb;
struct mqnic_reg_block *phc_rb;
int dev_port_max;
int dev_port_limit;
@ -335,7 +335,7 @@ struct mqnic_sched {
struct mqnic_if *interface;
struct mqnic_sched_block *sched_block;
struct reg_block *rb;
struct mqnic_reg_block *rb;
int index;
@ -351,8 +351,8 @@ struct mqnic_sched_block {
struct device *dev;
struct mqnic_if *interface;
struct reg_block *block_rb;
struct reg_block *rb_list;
struct mqnic_reg_block *block_rb;
struct mqnic_reg_block *rb_list;
int index;
@ -366,14 +366,14 @@ struct mqnic_if {
struct device *dev;
struct mqnic_dev *mdev;
struct reg_block *rb_list;
struct reg_block *if_ctrl_rb;
struct reg_block *event_queue_rb;
struct reg_block *tx_queue_rb;
struct reg_block *tx_cpl_queue_rb;
struct reg_block *rx_queue_rb;
struct reg_block *rx_cpl_queue_rb;
struct reg_block *rx_queue_map_rb;
struct mqnic_reg_block *rb_list;
struct mqnic_reg_block *if_ctrl_rb;
struct mqnic_reg_block *event_queue_rb;
struct mqnic_reg_block *tx_queue_rb;
struct mqnic_reg_block *tx_cpl_queue_rb;
struct mqnic_reg_block *rx_queue_rb;
struct mqnic_reg_block *rx_cpl_queue_rb;
struct mqnic_reg_block *rx_queue_map_rb;
int index;
@ -470,9 +470,9 @@ struct mqnic_priv {
// mqnic_main.c
// mqnic_reg_block.c
struct reg_block *enumerate_reg_block_list(u8 __iomem *base, size_t offset, size_t size);
struct reg_block *find_reg_block(struct reg_block *list, u32 type, u32 version, int index);
void free_reg_block_list(struct reg_block *list);
struct mqnic_reg_block *mqnic_enumerate_reg_block_list(u8 __iomem *base, size_t offset, size_t size);
struct mqnic_reg_block *mqnic_find_reg_block(struct mqnic_reg_block *list, u32 type, u32 version, int index);
void mqnic_free_reg_block_list(struct mqnic_reg_block *list);
// mqnic_irq.c
int mqnic_irq_init_pcie(struct mqnic_dev *mdev);
@ -505,14 +505,14 @@ void mqnic_destroy_netdev(struct net_device **ndev_ptr);
// mqnic_sched_block.c
int mqnic_create_sched_block(struct mqnic_if *interface, struct mqnic_sched_block **block_ptr,
int index, struct reg_block *rb);
int index, struct mqnic_reg_block *rb);
void mqnic_destroy_sched_block(struct mqnic_sched_block **block_ptr);
int mqnic_activate_sched_block(struct mqnic_sched_block *block);
void mqnic_deactivate_sched_block(struct mqnic_sched_block *block);
// mqnic_scheduler.c
int mqnic_create_scheduler(struct mqnic_sched_block *block, struct mqnic_sched **sched_ptr,
int index, struct reg_block *rb);
int index, struct mqnic_reg_block *rb);
void mqnic_destroy_scheduler(struct mqnic_sched **sched_ptr);
int mqnic_scheduler_enable(struct mqnic_sched *sched);
void mqnic_scheduler_disable(struct mqnic_sched *sched);

26
modules/mqnic/mqnic_board.c
View File

@ -547,21 +547,21 @@ static struct mqnic_board_ops generic_board_ops = {
.deinit = mqnic_generic_board_deinit
};
static u32 mqnic_alveo_bmc_reg_read(struct mqnic_dev *mqnic, struct reg_block *rb, u32 reg)
static u32 mqnic_alveo_bmc_reg_read(struct mqnic_dev *mqnic, struct mqnic_reg_block *rb, u32 reg)
{
iowrite32(reg, rb->regs + MQNIC_RB_ALVEO_BMC_REG_ADDR);
ioread32(rb->regs + MQNIC_RB_ALVEO_BMC_REG_DATA); // dummy read
return ioread32(rb->regs + MQNIC_RB_ALVEO_BMC_REG_DATA);
}
static void mqnic_alveo_bmc_reg_write(struct mqnic_dev *mqnic, struct reg_block *rb, u32 reg, u32 val)
static void mqnic_alveo_bmc_reg_write(struct mqnic_dev *mqnic, struct mqnic_reg_block *rb, u32 reg, u32 val)
{
iowrite32(reg, rb->regs + MQNIC_RB_ALVEO_BMC_REG_ADDR);
iowrite32(val, rb->regs + MQNIC_RB_ALVEO_BMC_REG_DATA);
ioread32(rb->regs + MQNIC_RB_ALVEO_BMC_REG_DATA); // dummy read
}
static int mqnic_alveo_bmc_read_mac(struct mqnic_dev *mqnic, struct reg_block *rb, int index, char *mac)
static int mqnic_alveo_bmc_read_mac(struct mqnic_dev *mqnic, struct mqnic_reg_block *rb, int index, char *mac)
{
u32 reg = 0x0281a0 + index * 8;
u32 val;
@ -579,7 +579,7 @@ static int mqnic_alveo_bmc_read_mac(struct mqnic_dev *mqnic, struct reg_block *r
return 0;
}
static int mqnic_alveo_bmc_read_mac_list(struct mqnic_dev *mqnic, struct reg_block *rb, int count)
static int mqnic_alveo_bmc_read_mac_list(struct mqnic_dev *mqnic, struct mqnic_reg_block *rb, int count)
{
int ret, k;
char mac[ETH_ALEN];
@ -612,7 +612,7 @@ static int mqnic_alveo_board_init(struct mqnic_dev *mqnic)
{
struct i2c_adapter *adapter;
struct i2c_client *mux;
struct reg_block *rb;
struct mqnic_reg_block *rb;
int ret = 0;
mqnic->mod_i2c_client_count = 0;
@ -664,7 +664,7 @@ static int mqnic_alveo_board_init(struct mqnic_dev *mqnic)
}
// init BMC
rb = find_reg_block(mqnic->rb_list, MQNIC_RB_ALVEO_BMC_TYPE, MQNIC_RB_ALVEO_BMC_VER, 0);
rb = mqnic_find_reg_block(mqnic->rb_list, MQNIC_RB_ALVEO_BMC_TYPE, MQNIC_RB_ALVEO_BMC_VER, 0);
if (rb) {
if (mqnic_alveo_bmc_reg_read(mqnic, rb, 0x020000) == 0 ||
@ -692,7 +692,7 @@ static struct mqnic_board_ops alveo_board_ops = {
.deinit = mqnic_generic_board_deinit
};
static int mqnic_gecko_bmc_read(struct mqnic_dev *mqnic, struct reg_block *rb)
static int mqnic_gecko_bmc_read(struct mqnic_dev *mqnic, struct mqnic_reg_block *rb)
{
u32 val;
int timeout = 200;
@ -720,7 +720,7 @@ static int mqnic_gecko_bmc_read(struct mqnic_dev *mqnic, struct reg_block *rb)
return -1;
}
static int mqnic_gecko_bmc_write(struct mqnic_dev *mqnic, struct reg_block *rb, u16 cmd, u32 data)
static int mqnic_gecko_bmc_write(struct mqnic_dev *mqnic, struct mqnic_reg_block *rb, u16 cmd, u32 data)
{
int ret;
@ -735,7 +735,7 @@ static int mqnic_gecko_bmc_write(struct mqnic_dev *mqnic, struct reg_block *rb,
return 0;
}
static int mqnic_gecko_bmc_query(struct mqnic_dev *mqnic, struct reg_block *rb, u16 cmd, u32 data)
static int mqnic_gecko_bmc_query(struct mqnic_dev *mqnic, struct mqnic_reg_block *rb, u16 cmd, u32 data)
{
int ret;
@ -747,7 +747,7 @@ static int mqnic_gecko_bmc_query(struct mqnic_dev *mqnic, struct reg_block *rb,
return mqnic_gecko_bmc_read(mqnic, rb);
}
static int mqnic_gecko_bmc_read_mac(struct mqnic_dev *mqnic, struct reg_block *rb, int index, char *mac)
static int mqnic_gecko_bmc_read_mac(struct mqnic_dev *mqnic, struct mqnic_reg_block *rb, int index, char *mac)
{
int i;
u16 val;
@ -763,7 +763,7 @@ static int mqnic_gecko_bmc_read_mac(struct mqnic_dev *mqnic, struct reg_block *r
return 0;
}
static int mqnic_gecko_bmc_read_mac_list(struct mqnic_dev *mqnic, struct reg_block *rb, int count)
static int mqnic_gecko_bmc_read_mac_list(struct mqnic_dev *mqnic, struct mqnic_reg_block *rb, int count)
{
int ret, k;
char mac[ETH_ALEN];
@ -795,7 +795,7 @@ static int mqnic_gecko_bmc_read_mac_list(struct mqnic_dev *mqnic, struct reg_blo
static int mqnic_gecko_board_init(struct mqnic_dev *mqnic)
{
struct i2c_adapter *adapter;
struct reg_block *rb;
struct mqnic_reg_block *rb;
int ret = 0;
mqnic->mod_i2c_client_count = 0;
@ -834,7 +834,7 @@ static int mqnic_gecko_board_init(struct mqnic_dev *mqnic)
}
// init BMC
rb = find_reg_block(mqnic->rb_list, MQNIC_RB_GECKO_BMC_TYPE, MQNIC_RB_GECKO_BMC_VER, 0);
rb = mqnic_find_reg_block(mqnic->rb_list, MQNIC_RB_GECKO_BMC_TYPE, MQNIC_RB_GECKO_BMC_VER, 0);
if (rb) {
if (mqnic_gecko_bmc_query(mqnic, rb, 0x7006, 0) <= 0) {

4
modules/mqnic/mqnic_i2c.c
View File

@ -74,9 +74,9 @@ struct mqnic_i2c_bus *mqnic_i2c_bus_create(struct mqnic_dev *mqnic, int index)
struct mqnic_i2c_bus *bus;
struct i2c_algo_bit_data *algo;
struct i2c_adapter *adapter;
struct reg_block *rb;
struct mqnic_reg_block *rb;
rb = find_reg_block(mqnic->rb_list, MQNIC_RB_I2C_TYPE, MQNIC_RB_I2C_VER, index);
rb = mqnic_find_reg_block(mqnic->rb_list, MQNIC_RB_I2C_TYPE, MQNIC_RB_I2C_VER, index);
if (!rb)
return NULL;

22
modules/mqnic/mqnic_if.c
View File

@ -40,7 +40,7 @@ int mqnic_create_interface(struct mqnic_dev *mdev, struct mqnic_if **interface_p
{
struct device *dev = mdev->dev;
struct mqnic_if *interface;
struct reg_block *rb;
struct mqnic_reg_block *rb;
int ret = 0;
int k;
u32 desc_block_size;
@ -61,7 +61,7 @@ int mqnic_create_interface(struct mqnic_dev *mdev, struct mqnic_if **interface_p
interface->csr_hw_addr = hw_addr + mdev->if_csr_offset;
// Enumerate registers
interface->rb_list = enumerate_reg_block_list(interface->hw_addr, mdev->if_csr_offset, interface->hw_regs_size);
interface->rb_list = mqnic_enumerate_reg_block_list(interface->hw_addr, mdev->if_csr_offset, interface->hw_regs_size);
if (!interface->rb_list) {
ret = -EIO;
dev_err(dev, "Failed to enumerate blocks");
@ -73,7 +73,7 @@ int mqnic_create_interface(struct mqnic_dev *mdev, struct mqnic_if **interface_p
dev_info(dev, " type 0x%08x (v %d.%d.%d.%d)", rb->type, rb->version >> 24,
(rb->version >> 16) & 0xff, (rb->version >> 8) & 0xff, rb->version & 0xff);
interface->if_ctrl_rb = find_reg_block(interface->rb_list, MQNIC_RB_IF_CTRL_TYPE, MQNIC_RB_IF_CTRL_VER, 0);
interface->if_ctrl_rb = mqnic_find_reg_block(interface->rb_list, MQNIC_RB_IF_CTRL_TYPE, MQNIC_RB_IF_CTRL_VER, 0);
if (!interface->if_ctrl_rb) {
ret = -EIO;
@ -93,7 +93,7 @@ int mqnic_create_interface(struct mqnic_dev *mdev, struct mqnic_if **interface_p
dev_info(dev, "Max TX MTU: %d", interface->max_tx_mtu);
dev_info(dev, "Max RX MTU: %d", interface->max_rx_mtu);
interface->event_queue_rb = find_reg_block(interface->rb_list, MQNIC_RB_EVENT_QM_TYPE, MQNIC_RB_EVENT_QM_VER, 0);
interface->event_queue_rb = mqnic_find_reg_block(interface->rb_list, MQNIC_RB_EVENT_QM_TYPE, MQNIC_RB_EVENT_QM_VER, 0);
if (!interface->event_queue_rb) {
ret = -EIO;
@ -111,7 +111,7 @@ int mqnic_create_interface(struct mqnic_dev *mdev, struct mqnic_if **interface_p
interface->event_queue_count = min_t(u32, interface->event_queue_count, MQNIC_MAX_EVENT_RINGS);
interface->tx_queue_rb = find_reg_block(interface->rb_list, MQNIC_RB_TX_QM_TYPE, MQNIC_RB_TX_QM_VER, 0);
interface->tx_queue_rb = mqnic_find_reg_block(interface->rb_list, MQNIC_RB_TX_QM_TYPE, MQNIC_RB_TX_QM_VER, 0);
if (!interface->tx_queue_rb) {
ret = -EIO;
@ -129,7 +129,7 @@ int mqnic_create_interface(struct mqnic_dev *mdev, struct mqnic_if **interface_p
interface->tx_queue_count = min_t(u32, interface->tx_queue_count, MQNIC_MAX_TX_RINGS);
interface->tx_cpl_queue_rb = find_reg_block(interface->rb_list, MQNIC_RB_TX_CQM_TYPE, MQNIC_RB_TX_CQM_VER, 0);
interface->tx_cpl_queue_rb = mqnic_find_reg_block(interface->rb_list, MQNIC_RB_TX_CQM_TYPE, MQNIC_RB_TX_CQM_VER, 0);
if (!interface->tx_cpl_queue_rb) {
ret = -EIO;
@ -147,7 +147,7 @@ int mqnic_create_interface(struct mqnic_dev *mdev, struct mqnic_if **interface_p
interface->tx_cpl_queue_count = min_t(u32, interface->tx_cpl_queue_count, MQNIC_MAX_TX_CPL_RINGS);
interface->rx_queue_rb = find_reg_block(interface->rb_list, MQNIC_RB_RX_QM_TYPE, MQNIC_RB_RX_QM_VER, 0);
interface->rx_queue_rb = mqnic_find_reg_block(interface->rb_list, MQNIC_RB_RX_QM_TYPE, MQNIC_RB_RX_QM_VER, 0);
if (!interface->rx_queue_rb) {
ret = -EIO;
@ -165,7 +165,7 @@ int mqnic_create_interface(struct mqnic_dev *mdev, struct mqnic_if **interface_p
interface->rx_queue_count = min_t(u32, interface->rx_queue_count, MQNIC_MAX_RX_RINGS);
interface->rx_cpl_queue_rb = find_reg_block(interface->rb_list, MQNIC_RB_RX_CQM_TYPE, MQNIC_RB_RX_CQM_VER, 0);
interface->rx_cpl_queue_rb = mqnic_find_reg_block(interface->rb_list, MQNIC_RB_RX_CQM_TYPE, MQNIC_RB_RX_CQM_VER, 0);
if (!interface->rx_cpl_queue_rb) {
ret = -EIO;
@ -183,7 +183,7 @@ int mqnic_create_interface(struct mqnic_dev *mdev, struct mqnic_if **interface_p
interface->rx_cpl_queue_count = min_t(u32, interface->rx_cpl_queue_count, MQNIC_MAX_RX_CPL_RINGS);
interface->rx_queue_map_rb = find_reg_block(interface->rb_list, MQNIC_RB_RX_QUEUE_MAP_TYPE, MQNIC_RB_RX_QUEUE_MAP_VER, 0);
interface->rx_queue_map_rb = mqnic_find_reg_block(interface->rb_list, MQNIC_RB_RX_QUEUE_MAP_TYPE, MQNIC_RB_RX_QUEUE_MAP_VER, 0);
if (!interface->rx_queue_map_rb) {
ret = -EIO;
@ -254,7 +254,7 @@ int mqnic_create_interface(struct mqnic_dev *mdev, struct mqnic_if **interface_p
// create schedulers
for (k = 0; k < interface->sched_block_count; k++) {
struct reg_block *sched_block_rb = find_reg_block(interface->rb_list, MQNIC_RB_SCHED_BLOCK_TYPE, MQNIC_RB_SCHED_BLOCK_VER, k);
struct mqnic_reg_block *sched_block_rb = mqnic_find_reg_block(interface->rb_list, MQNIC_RB_SCHED_BLOCK_TYPE, MQNIC_RB_SCHED_BLOCK_VER, k);
if (!sched_block_rb) {
ret = -EIO;
@ -323,7 +323,7 @@ void mqnic_destroy_interface(struct mqnic_if **interface_ptr)
mqnic_destroy_sched_block(&interface->sched_block[k]);
if (interface->rb_list)
free_reg_block_list(interface->rb_list);
mqnic_free_reg_block_list(interface->rb_list);
*interface_ptr = NULL;
kfree(interface);

14
modules/mqnic/mqnic_main.c
View File

@ -261,13 +261,13 @@ static int mqnic_common_probe(struct mqnic_dev *mqnic)
{
int ret = 0;
struct device *dev = mqnic->dev;
struct reg_block *rb;
struct mqnic_reg_block *rb;
struct rtc_time tm;
int k = 0, l = 0;
// Enumerate registers
mqnic->rb_list = enumerate_reg_block_list(mqnic->hw_addr, 0, mqnic->hw_regs_size);
mqnic->rb_list = mqnic_enumerate_reg_block_list(mqnic->hw_addr, 0, mqnic->hw_regs_size);
if (!mqnic->rb_list) {
dev_err(dev, "Failed to enumerate blocks");
return -EIO;
@ -279,7 +279,7 @@ static int mqnic_common_probe(struct mqnic_dev *mqnic)
(rb->version >> 16) & 0xff, (rb->version >> 8) & 0xff, rb->version & 0xff);
// Read ID registers
mqnic->fw_id_rb = find_reg_block(mqnic->rb_list, MQNIC_RB_FW_ID_TYPE, MQNIC_RB_FW_ID_VER, 0);
mqnic->fw_id_rb = mqnic_find_reg_block(mqnic->rb_list, MQNIC_RB_FW_ID_TYPE, MQNIC_RB_FW_ID_VER, 0);
if (!mqnic->fw_id_rb) {
ret = -EIO;
@ -319,17 +319,17 @@ static int mqnic_common_probe(struct mqnic_dev *mqnic)
dev_info(dev, "Git hash: %08x", mqnic->git_hash);
dev_info(dev, "Release info: %08x", mqnic->rel_info);
rb = find_reg_block(mqnic->rb_list, MQNIC_RB_APP_INFO_TYPE, MQNIC_RB_APP_INFO_VER, 0);
rb = mqnic_find_reg_block(mqnic->rb_list, MQNIC_RB_APP_INFO_TYPE, MQNIC_RB_APP_INFO_VER, 0);
if (rb) {
mqnic->app_id = ioread32(rb->regs + MQNIC_RB_APP_INFO_REG_ID);
dev_info(dev, "Application ID: 0x%08x", mqnic->app_id);
}
mqnic->phc_rb = find_reg_block(mqnic->rb_list, MQNIC_RB_PHC_TYPE, MQNIC_RB_PHC_VER, 0);
mqnic->phc_rb = mqnic_find_reg_block(mqnic->rb_list, MQNIC_RB_PHC_TYPE, MQNIC_RB_PHC_VER, 0);
// Enumerate interfaces
mqnic->if_rb = find_reg_block(mqnic->rb_list, MQNIC_RB_IF_TYPE, MQNIC_RB_IF_VER, 0);
mqnic->if_rb = mqnic_find_reg_block(mqnic->rb_list, MQNIC_RB_IF_TYPE, MQNIC_RB_IF_VER, 0);
if (!mqnic->if_rb) {
ret = -EIO;
@ -498,7 +498,7 @@ static void mqnic_common_remove(struct mqnic_dev *mqnic)
mqnic_board_deinit(mqnic);
}
if (mqnic->rb_list)
free_reg_block_list(mqnic->rb_list);
mqnic_free_reg_block_list(mqnic->rb_list);
}
#ifdef CONFIG_PCI

8
modules/mqnic/mqnic_ptp.c
View File

@ -155,12 +155,12 @@ static int mqnic_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
static int mqnic_phc_perout(struct ptp_clock_info *ptp, int on, struct ptp_perout_request *perout)
{
struct mqnic_dev *mdev = container_of(ptp, struct mqnic_dev, ptp_clock_info);
struct reg_block *rb;
struct mqnic_reg_block *rb;
u64 start_sec, period_sec, width_sec;
u32 start_nsec, period_nsec, width_nsec;
rb = find_reg_block(mdev->rb_list, MQNIC_RB_PHC_PEROUT_TYPE,
rb = mqnic_find_reg_block(mdev->rb_list, MQNIC_RB_PHC_PEROUT_TYPE,
MQNIC_RB_PHC_PEROUT_VER, perout->index);
if (!rb)
@ -243,7 +243,7 @@ static void mqnic_phc_set_from_system_clock(struct ptp_clock_info *ptp)
void mqnic_register_phc(struct mqnic_dev *mdev)
{
int perout_ch_count = 0;
struct reg_block *rb;
struct mqnic_reg_block *rb;
if (!mdev->phc_rb) {
dev_warn(mdev->dev, "PTP clock not present");
@ -256,7 +256,7 @@ void mqnic_register_phc(struct mqnic_dev *mdev)
}
// count PTP period output channels
while ((rb = find_reg_block(mdev->rb_list, MQNIC_RB_PHC_PEROUT_TYPE,
while ((rb = mqnic_find_reg_block(mdev->rb_list, MQNIC_RB_PHC_PEROUT_TYPE,
MQNIC_RB_PHC_PEROUT_VER, perout_ch_count))) {
perout_ch_count++;
}

14
modules/mqnic/mqnic_reg_block.c
View File

@ -35,10 +35,10 @@
#include "mqnic.h"
struct reg_block *enumerate_reg_block_list(u8 __iomem *base, size_t offset, size_t size)
struct mqnic_reg_block *mqnic_enumerate_reg_block_list(u8 __iomem *base, size_t offset, size_t size)
{
int max_count = 8;
struct reg_block *reg_block_list = kzalloc(max_count * sizeof(struct reg_block), GFP_KERNEL);
struct mqnic_reg_block *reg_block_list = kzalloc(max_count * sizeof(struct mqnic_reg_block), GFP_KERNEL);
int count = 0;
int k;
@ -82,9 +82,9 @@ struct reg_block *enumerate_reg_block_list(u8 __iomem *base, size_t offset, size
count++;
if (count >= max_count) {
struct reg_block *tmp;
struct mqnic_reg_block *tmp;
max_count += 4;
tmp = krealloc(reg_block_list, max_count * sizeof(struct reg_block), GFP_KERNEL);
tmp = krealloc(reg_block_list, max_count * sizeof(struct mqnic_reg_block), GFP_KERNEL);
if (!tmp)
goto fail;
reg_block_list = tmp;
@ -97,9 +97,9 @@ fail:
return NULL;
}
struct reg_block *find_reg_block(struct reg_block *list, u32 type, u32 version, int index)
struct mqnic_reg_block *mqnic_find_reg_block(struct mqnic_reg_block *list, u32 type, u32 version, int index)
{
struct reg_block *rb = list;
struct mqnic_reg_block *rb = list;
while (rb->regs) {
if (rb->type == type && (!version || rb->version == version)) {
@ -115,7 +115,7 @@ struct reg_block *find_reg_block(struct reg_block *list, u32 type, u32 version,
return NULL;
}
void free_reg_block_list(struct reg_block *list)
void mqnic_free_reg_block_list(struct mqnic_reg_block *list)
{
kfree(list);
}

8
modules/mqnic/mqnic_sched_block.c
View File

@ -36,11 +36,11 @@
#include "mqnic.h"
int mqnic_create_sched_block(struct mqnic_if *interface, struct mqnic_sched_block **block_ptr,
int index, struct reg_block *block_rb)
int index, struct mqnic_reg_block *block_rb)
{
struct device *dev = interface->dev;
struct mqnic_sched_block *block;
struct reg_block *rb;
struct mqnic_reg_block *rb;
u32 offset;
int ret = 0;
@ -61,7 +61,7 @@ int mqnic_create_sched_block(struct mqnic_if *interface, struct mqnic_sched_bloc
offset = ioread32(block_rb->regs + MQNIC_RB_SCHED_BLOCK_REG_OFFSET);
block->rb_list = enumerate_reg_block_list(interface->hw_addr, offset, interface->hw_regs_size - offset);
block->rb_list = mqnic_enumerate_reg_block_list(interface->hw_addr, offset, interface->hw_regs_size - offset);
if (!block->rb_list) {
ret = -EIO;
@ -110,7 +110,7 @@ void mqnic_destroy_sched_block(struct mqnic_sched_block **block_ptr)
mqnic_destroy_scheduler(&block->sched[k]);
if (block->rb_list)
free_reg_block_list(block->rb_list);
mqnic_free_reg_block_list(block->rb_list);
*block_ptr = NULL;
kfree(block);

2
modules/mqnic/mqnic_scheduler.c
View File

@ -36,7 +36,7 @@
#include "mqnic.h"
int mqnic_create_scheduler(struct mqnic_sched_block *block, struct mqnic_sched **sched_ptr,
int index, struct reg_block *rb)
int index, struct mqnic_reg_block *rb)
{
struct device *dev = block->dev;
struct mqnic_sched *sched;