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fpga/mqnic/DK_DEV_1SDX_P_A: Parameter clean-up

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2023-05-21 14:53:30 -07:00
parent 47cfc828a2
commit eb3343764d
2 changed files with 7 additions and 21 deletions
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20
fpga/mqnic/DK_DEV_1SDX_P_A/fpga_100g/rtl/fpga.v
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@ -130,17 +130,8 @@ module fpga #
// PCIe interface configuration
parameter SEG_COUNT = 2,
parameter SEG_DATA_WIDTH = 256,
parameter SEG_EMPTY_WIDTH = $clog2(SEG_DATA_WIDTH/32),
parameter SEG_HDR_WIDTH = 128,
parameter SEG_PRFX_WIDTH = 32,
parameter TX_SEQ_NUM_WIDTH = 6,
parameter PF_COUNT = 1,
parameter VF_COUNT = 0,
parameter PCIE_TAG_COUNT = 256,
parameter PCIE_DMA_READ_OP_TABLE_SIZE = PCIE_TAG_COUNT,
parameter PCIE_DMA_READ_TX_LIMIT = 2**TX_SEQ_NUM_WIDTH,
parameter PCIE_DMA_WRITE_OP_TABLE_SIZE = 2**TX_SEQ_NUM_WIDTH,
parameter PCIE_DMA_WRITE_TX_LIMIT = 2**TX_SEQ_NUM_WIDTH,
// Interrupt configuration
parameter IRQ_INDEX_WIDTH = EVENT_QUEUE_INDEX_WIDTH,
@ -228,6 +219,13 @@ parameter PTP_USE_SAMPLE_CLOCK = 1;
// Interface configuration
parameter TX_TAG_WIDTH = PTP_TAG_WIDTH;
// PCIe interface configuration
parameter SEG_EMPTY_WIDTH = $clog2(SEG_DATA_WIDTH/32);
parameter SEG_HDR_WIDTH = 128;
parameter SEG_PRFX_WIDTH = 32;
parameter TX_SEQ_NUM_WIDTH = 6;
parameter PCIE_TAG_COUNT = 256;
// Ethernet interface configuration
parameter AXIS_ETH_DATA_WIDTH = 512;
parameter AXIS_ETH_KEEP_WIDTH = AXIS_ETH_DATA_WIDTH/8;
@ -693,10 +691,6 @@ fpga_core #(
.PF_COUNT(PF_COUNT),
.VF_COUNT(VF_COUNT),
.PCIE_TAG_COUNT(PCIE_TAG_COUNT),
.PCIE_DMA_READ_OP_TABLE_SIZE(PCIE_DMA_READ_OP_TABLE_SIZE),
.PCIE_DMA_READ_TX_LIMIT(PCIE_DMA_READ_TX_LIMIT),
.PCIE_DMA_WRITE_OP_TABLE_SIZE(PCIE_DMA_WRITE_OP_TABLE_SIZE),
.PCIE_DMA_WRITE_TX_LIMIT(PCIE_DMA_WRITE_TX_LIMIT),
// Interrupt configuration
.IRQ_INDEX_WIDTH(IRQ_INDEX_WIDTH),

8
fpga/mqnic/DK_DEV_1SDX_P_A/fpga_100g/rtl/fpga_core.v
View File

@ -145,10 +145,6 @@ module fpga_core #
parameter PF_COUNT = 1,
parameter VF_COUNT = 0,
parameter PCIE_TAG_COUNT = 256,
parameter PCIE_DMA_READ_OP_TABLE_SIZE = PCIE_TAG_COUNT,
parameter PCIE_DMA_READ_TX_LIMIT = 2**TX_SEQ_NUM_WIDTH,
parameter PCIE_DMA_WRITE_OP_TABLE_SIZE = 2**TX_SEQ_NUM_WIDTH,
parameter PCIE_DMA_WRITE_TX_LIMIT = 2**TX_SEQ_NUM_WIDTH,
// Interrupt configuration
parameter IRQ_INDEX_WIDTH = EVENT_QUEUE_INDEX_WIDTH,
@ -684,10 +680,6 @@ mqnic_core_pcie_ptile #(
.VF_COUNT(VF_COUNT),
.F_COUNT(F_COUNT),
.PCIE_TAG_COUNT(PCIE_TAG_COUNT),
.PCIE_DMA_READ_OP_TABLE_SIZE(PCIE_DMA_READ_OP_TABLE_SIZE),
.PCIE_DMA_READ_TX_LIMIT(PCIE_DMA_READ_TX_LIMIT),
.PCIE_DMA_WRITE_OP_TABLE_SIZE(PCIE_DMA_WRITE_OP_TABLE_SIZE),
.PCIE_DMA_WRITE_TX_LIMIT(PCIE_DMA_WRITE_TX_LIMIT),
// Interrupt configuration
.IRQ_INDEX_WIDTH(IRQ_INDEX_WIDTH),