diff --git a/fpga/mqnic/DE10_Agilex/fpga_100g/ip/mac_02.tcl b/fpga/mqnic/DE10_Agilex/fpga_100g/ip/mac_02.tcl index ff6ac431e..970d2a6d7 100644 --- a/fpga/mqnic/DE10_Agilex/fpga_100g/ip/mac_02.tcl +++ b/fpga/mqnic/DE10_Agilex/fpga_100g/ip/mac_02.tcl @@ -4,6 +4,7 @@ package require -exact qsys 21.3 proc do_create_mac_02 {} { # create the system create_system mac_02 + set_project_property BOARD {Intel Agilex F-Series FPGA Development Kit DK-DEV-AGF014EA} set_project_property DEVICE {AGFB014R24B2E2V} set_project_property DEVICE_FAMILY {Agilex} set_project_property HIDE_FROM_IP_CATALOG {true} @@ -106,7 +107,10 @@ proc do_create_mac_02 {} { set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_include_alternate_ports} {0} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_modulation} {NRZ} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_number_of_channel} {1} + set_instance_parameter_value alt_ehipc3_fm_0 {design_environment} {NATIVE} + set_instance_parameter_value alt_ehipc3_fm_0 {dis_anlt_std_recipe} {0} set_instance_parameter_value alt_ehipc3_fm_0 {disable_internal_dr} {0} + set_instance_parameter_value alt_ehipc3_fm_0 {dr_100g_nrz_pam4} {0} set_instance_parameter_value alt_ehipc3_fm_0 {dr_25g_cpri} {0} set_instance_parameter_value alt_ehipc3_fm_0 {duplex_mode} {enable} set_instance_parameter_value alt_ehipc3_fm_0 {ehip_mode_gui} {MAC+1588PTP+PCS+(528,514)RSFEC} @@ -202,25 +206,8 @@ proc do_create_mac_02 {} { set_interface_property i_stats_snapshot EXPORT_OF alt_ehipc3_fm_0.i_stats_snapshot set_interface_property o_cdr_lock EXPORT_OF alt_ehipc3_fm_0.o_cdr_lock set_interface_property o_tx_pll_locked EXPORT_OF alt_ehipc3_fm_0.o_tx_pll_locked - set_interface_property i_eth_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_addr - set_interface_property i_eth_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_read - set_interface_property i_eth_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_write - set_interface_property o_eth_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata - set_interface_property o_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata_valid - set_interface_property i_eth_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_writedata - set_interface_property o_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_waitrequest - set_interface_property i_rsfec_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_addr - set_interface_property i_rsfec_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_read - set_interface_property i_rsfec_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_write - set_interface_property o_rsfec_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_rsfec_reconfig_readdata - set_interface_property i_rsfec_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_writedata - set_interface_property o_rsfec_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_rsfec_reconfig_waitrequest - set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address - set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read - set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write - set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata - set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata - set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest + set_interface_property eth_reconfig EXPORT_OF alt_ehipc3_fm_0.eth_reconfig + set_interface_property rsfec_reconfig EXPORT_OF alt_ehipc3_fm_0.rsfec_reconfig set_interface_property o_tx_lanes_stable EXPORT_OF alt_ehipc3_fm_0.o_tx_lanes_stable set_interface_property o_rx_pcs_ready EXPORT_OF alt_ehipc3_fm_0.o_rx_pcs_ready set_interface_property o_ehip_ready EXPORT_OF alt_ehipc3_fm_0.o_ehip_ready @@ -229,13 +216,8 @@ proc do_create_mac_02 {} { set_interface_property o_rx_hi_ber EXPORT_OF alt_ehipc3_fm_0.o_rx_hi_ber set_interface_property o_local_fault_status EXPORT_OF alt_ehipc3_fm_0.o_local_fault_status set_interface_property o_remote_fault_status EXPORT_OF alt_ehipc3_fm_0.o_remote_fault_status - set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref set_interface_property i_clk_tx EXPORT_OF alt_ehipc3_fm_0.i_clk_tx set_interface_property i_clk_rx EXPORT_OF alt_ehipc3_fm_0.i_clk_rx - set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 - set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 - set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 - set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 set_interface_property i_csr_rst_n EXPORT_OF alt_ehipc3_fm_0.i_csr_rst_n set_interface_property i_tx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_tx_rst_n set_interface_property i_rx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_rx_rst_n @@ -243,12 +225,25 @@ proc do_create_mac_02 {} { set_interface_property serial_n EXPORT_OF alt_ehipc3_fm_0.serial_n set_interface_property i_reconfig_clk EXPORT_OF alt_ehipc3_fm_0.i_reconfig_clk set_interface_property i_reconfig_reset EXPORT_OF alt_ehipc3_fm_0.i_reconfig_reset + set_interface_property tx_streaming EXPORT_OF alt_ehipc3_fm_0.tx_streaming + set_interface_property rx_streaming EXPORT_OF alt_ehipc3_fm_0.rx_streaming set_interface_property i_xcvr_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_address set_interface_property i_xcvr_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_read set_interface_property i_xcvr_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_write set_interface_property o_xcvr_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_readdata set_interface_property i_xcvr_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_writedata set_interface_property o_xcvr_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_waitrequest + set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref + set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 + set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 + set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 + set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 + set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address + set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read + set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write + set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata + set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata + set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest set_interface_property ptp_tod_ports EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports set_interface_property ptp_ports EXPORT_OF alt_ehipc3_fm_0.ptp_ports set_interface_property ptp_1step_ports EXPORT_OF alt_ehipc3_fm_0.ptp_1step_ports diff --git a/fpga/mqnic/DE10_Agilex/fpga_100g/ip/mac_13.tcl b/fpga/mqnic/DE10_Agilex/fpga_100g/ip/mac_13.tcl index 312103734..3d0bdcb67 100644 --- a/fpga/mqnic/DE10_Agilex/fpga_100g/ip/mac_13.tcl +++ b/fpga/mqnic/DE10_Agilex/fpga_100g/ip/mac_13.tcl @@ -4,6 +4,7 @@ package require -exact qsys 21.3 proc do_create_mac_13 {} { # create the system create_system mac_13 + set_project_property BOARD {Intel Agilex F-Series FPGA Development Kit DK-DEV-AGF014EA} set_project_property DEVICE {AGFB014R24B2E2V} set_project_property DEVICE_FAMILY {Agilex} set_project_property HIDE_FROM_IP_CATALOG {true} @@ -106,7 +107,10 @@ proc do_create_mac_13 {} { set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_include_alternate_ports} {0} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_modulation} {NRZ} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_number_of_channel} {1} + set_instance_parameter_value alt_ehipc3_fm_0 {design_environment} {NATIVE} + set_instance_parameter_value alt_ehipc3_fm_0 {dis_anlt_std_recipe} {0} set_instance_parameter_value alt_ehipc3_fm_0 {disable_internal_dr} {0} + set_instance_parameter_value alt_ehipc3_fm_0 {dr_100g_nrz_pam4} {0} set_instance_parameter_value alt_ehipc3_fm_0 {dr_25g_cpri} {0} set_instance_parameter_value alt_ehipc3_fm_0 {duplex_mode} {enable} set_instance_parameter_value alt_ehipc3_fm_0 {ehip_mode_gui} {MAC+1588PTP+PCS+(528,514)RSFEC} @@ -202,25 +206,8 @@ proc do_create_mac_13 {} { set_interface_property i_stats_snapshot EXPORT_OF alt_ehipc3_fm_0.i_stats_snapshot set_interface_property o_cdr_lock EXPORT_OF alt_ehipc3_fm_0.o_cdr_lock set_interface_property o_tx_pll_locked EXPORT_OF alt_ehipc3_fm_0.o_tx_pll_locked - set_interface_property i_eth_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_addr - set_interface_property i_eth_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_read - set_interface_property i_eth_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_write - set_interface_property o_eth_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata - set_interface_property o_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata_valid - set_interface_property i_eth_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_writedata - set_interface_property o_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_waitrequest - set_interface_property i_rsfec_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_addr - set_interface_property i_rsfec_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_read - set_interface_property i_rsfec_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_write - set_interface_property o_rsfec_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_rsfec_reconfig_readdata - set_interface_property i_rsfec_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_writedata - set_interface_property o_rsfec_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_rsfec_reconfig_waitrequest - set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address - set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read - set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write - set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata - set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata - set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest + set_interface_property eth_reconfig EXPORT_OF alt_ehipc3_fm_0.eth_reconfig + set_interface_property rsfec_reconfig EXPORT_OF alt_ehipc3_fm_0.rsfec_reconfig set_interface_property o_tx_lanes_stable EXPORT_OF alt_ehipc3_fm_0.o_tx_lanes_stable set_interface_property o_rx_pcs_ready EXPORT_OF alt_ehipc3_fm_0.o_rx_pcs_ready set_interface_property o_ehip_ready EXPORT_OF alt_ehipc3_fm_0.o_ehip_ready @@ -229,13 +216,8 @@ proc do_create_mac_13 {} { set_interface_property o_rx_hi_ber EXPORT_OF alt_ehipc3_fm_0.o_rx_hi_ber set_interface_property o_local_fault_status EXPORT_OF alt_ehipc3_fm_0.o_local_fault_status set_interface_property o_remote_fault_status EXPORT_OF alt_ehipc3_fm_0.o_remote_fault_status - set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref set_interface_property i_clk_tx EXPORT_OF alt_ehipc3_fm_0.i_clk_tx set_interface_property i_clk_rx EXPORT_OF alt_ehipc3_fm_0.i_clk_rx - set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 - set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 - set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 - set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 set_interface_property i_csr_rst_n EXPORT_OF alt_ehipc3_fm_0.i_csr_rst_n set_interface_property i_tx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_tx_rst_n set_interface_property i_rx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_rx_rst_n @@ -243,12 +225,25 @@ proc do_create_mac_13 {} { set_interface_property serial_n EXPORT_OF alt_ehipc3_fm_0.serial_n set_interface_property i_reconfig_clk EXPORT_OF alt_ehipc3_fm_0.i_reconfig_clk set_interface_property i_reconfig_reset EXPORT_OF alt_ehipc3_fm_0.i_reconfig_reset + set_interface_property tx_streaming EXPORT_OF alt_ehipc3_fm_0.tx_streaming + set_interface_property rx_streaming EXPORT_OF alt_ehipc3_fm_0.rx_streaming set_interface_property i_xcvr_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_address set_interface_property i_xcvr_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_read set_interface_property i_xcvr_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_write set_interface_property o_xcvr_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_readdata set_interface_property i_xcvr_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_writedata set_interface_property o_xcvr_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_waitrequest + set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref + set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 + set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 + set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 + set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 + set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address + set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read + set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write + set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata + set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata + set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest set_interface_property ptp_tod_ports EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports set_interface_property ptp_ports EXPORT_OF alt_ehipc3_fm_0.ptp_ports set_interface_property ptp_1step_ports EXPORT_OF alt_ehipc3_fm_0.ptp_1step_ports diff --git a/fpga/mqnic/DE10_Agilex/fpga_25g/ip/10g/mac_02.tcl b/fpga/mqnic/DE10_Agilex/fpga_25g/ip/10g/mac_02.tcl index 2146fc11d..52e0aa164 100644 --- a/fpga/mqnic/DE10_Agilex/fpga_25g/ip/10g/mac_02.tcl +++ b/fpga/mqnic/DE10_Agilex/fpga_25g/ip/10g/mac_02.tcl @@ -4,6 +4,7 @@ package require -exact qsys 21.3 proc do_create_mac_02 {} { # create the system create_system mac_02 + set_project_property BOARD {Intel Agilex F-Series FPGA Development Kit DK-DEV-AGF014EA} set_project_property DEVICE {AGFB014R24B2E2V} set_project_property DEVICE_FAMILY {Agilex} set_project_property HIDE_FROM_IP_CATALOG {true} @@ -106,7 +107,10 @@ proc do_create_mac_02 {} { set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_include_alternate_ports} {0} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_modulation} {NRZ} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_number_of_channel} {1} + set_instance_parameter_value alt_ehipc3_fm_0 {design_environment} {NATIVE} + set_instance_parameter_value alt_ehipc3_fm_0 {dis_anlt_std_recipe} {0} set_instance_parameter_value alt_ehipc3_fm_0 {disable_internal_dr} {0} + set_instance_parameter_value alt_ehipc3_fm_0 {dr_100g_nrz_pam4} {0} set_instance_parameter_value alt_ehipc3_fm_0 {dr_25g_cpri} {0} set_instance_parameter_value alt_ehipc3_fm_0 {duplex_mode} {enable} set_instance_parameter_value alt_ehipc3_fm_0 {ehip_mode_gui} {MAC+PCS} @@ -201,37 +205,39 @@ proc do_create_mac_02 {} { # add the exports set_interface_property o_cdr_lock EXPORT_OF alt_ehipc3_fm_0.o_cdr_lock set_interface_property o_tx_pll_locked EXPORT_OF alt_ehipc3_fm_0.o_tx_pll_locked - set_interface_property i_eth_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_addr - set_interface_property i_eth_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_read - set_interface_property i_eth_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_write - set_interface_property o_eth_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata - set_interface_property o_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata_valid - set_interface_property i_eth_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_writedata - set_interface_property o_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_waitrequest - set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address - set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read - set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write - set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata - set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata - set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest - set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref - set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 - set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 - set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 - set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 + set_interface_property eth_reconfig EXPORT_OF alt_ehipc3_fm_0.eth_reconfig set_interface_property i_csr_rst_n EXPORT_OF alt_ehipc3_fm_0.i_csr_rst_n set_interface_property serial_p EXPORT_OF alt_ehipc3_fm_0.serial_p set_interface_property serial_n EXPORT_OF alt_ehipc3_fm_0.serial_n set_interface_property i_reconfig_clk EXPORT_OF alt_ehipc3_fm_0.i_reconfig_clk set_interface_property i_reconfig_reset EXPORT_OF alt_ehipc3_fm_0.i_reconfig_reset + set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_fm_0.i_sl_stats_snapshot + set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_hi_ber + set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_fm_0.o_sl_tx_lanes_stable + set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_pcs_ready + set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_ehip_ready + set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_block_lock + set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_local_fault_status + set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_remote_fault_status set_interface_property i_xcvr_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_address set_interface_property i_xcvr_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_read set_interface_property i_xcvr_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_write set_interface_property o_xcvr_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_readdata set_interface_property i_xcvr_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_writedata set_interface_property o_xcvr_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_waitrequest - set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_fm_0.i_sl_stats_snapshot - set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_hi_ber + set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref + set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 + set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 + set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 + set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 + set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx_tod + set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx_tod + set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address + set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read + set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write + set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata + set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata + set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest set_interface_property i_sl_eth_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_addr set_interface_property i_sl_eth_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_read set_interface_property i_sl_eth_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_write @@ -239,24 +245,17 @@ proc do_create_mac_02 {} { set_interface_property o_sl_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_fm_0.o_sl_eth_reconfig_readdata_valid set_interface_property i_sl_eth_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_writedata set_interface_property o_sl_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_sl_eth_reconfig_waitrequest - set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_fm_0.o_sl_tx_lanes_stable - set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_pcs_ready - set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_ehip_ready - set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_block_lock - set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_local_fault_status - set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_remote_fault_status set_interface_property i_sl_clk_tx EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx set_interface_property i_sl_clk_rx EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx - set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx_tod - set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx_tod set_interface_property i_sl_csr_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_csr_rst_n set_interface_property i_sl_tx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_tx_rst_n set_interface_property i_sl_rx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_rx_rst_n set_interface_property sl_xcvr_fifo_ports EXPORT_OF alt_ehipc3_fm_0.sl_xcvr_fifo_ports set_interface_property sl_nonpcs_ports EXPORT_OF alt_ehipc3_fm_0.sl_nonpcs_ports + set_interface_property ptp_tod_ports_1p5ns_tx EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns_tx + set_interface_property ptp_tod_ports_1p5ns_rx EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns_rx set_interface_property sl_pfc_ports EXPORT_OF alt_ehipc3_fm_0.sl_pfc_ports set_interface_property sl_pause_ports EXPORT_OF alt_ehipc3_fm_0.sl_pause_ports - set_interface_property ptp_tod_ports_1p5ns EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns set_interface_property sl_ptp_ports EXPORT_OF alt_ehipc3_fm_0.sl_ptp_ports set_interface_property sl_ptp_ports_1p5ns EXPORT_OF alt_ehipc3_fm_0.sl_ptp_ports_1p5ns set_interface_property sl_ptp_1step_ports EXPORT_OF alt_ehipc3_fm_0.sl_ptp_1step_ports diff --git a/fpga/mqnic/DE10_Agilex/fpga_25g/ip/10g/mac_13.tcl b/fpga/mqnic/DE10_Agilex/fpga_25g/ip/10g/mac_13.tcl index 83abab462..b565966ff 100644 --- a/fpga/mqnic/DE10_Agilex/fpga_25g/ip/10g/mac_13.tcl +++ b/fpga/mqnic/DE10_Agilex/fpga_25g/ip/10g/mac_13.tcl @@ -4,6 +4,7 @@ package require -exact qsys 21.3 proc do_create_mac_13 {} { # create the system create_system mac_13 + set_project_property BOARD {Intel Agilex F-Series FPGA Development Kit DK-DEV-AGF014EA} set_project_property DEVICE {AGFB014R24B2E2V} set_project_property DEVICE_FAMILY {Agilex} set_project_property HIDE_FROM_IP_CATALOG {true} @@ -106,7 +107,10 @@ proc do_create_mac_13 {} { set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_include_alternate_ports} {0} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_modulation} {NRZ} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_number_of_channel} {1} + set_instance_parameter_value alt_ehipc3_fm_0 {design_environment} {NATIVE} + set_instance_parameter_value alt_ehipc3_fm_0 {dis_anlt_std_recipe} {0} set_instance_parameter_value alt_ehipc3_fm_0 {disable_internal_dr} {0} + set_instance_parameter_value alt_ehipc3_fm_0 {dr_100g_nrz_pam4} {0} set_instance_parameter_value alt_ehipc3_fm_0 {dr_25g_cpri} {0} set_instance_parameter_value alt_ehipc3_fm_0 {duplex_mode} {enable} set_instance_parameter_value alt_ehipc3_fm_0 {ehip_mode_gui} {MAC+PCS} @@ -201,37 +205,39 @@ proc do_create_mac_13 {} { # add the exports set_interface_property o_cdr_lock EXPORT_OF alt_ehipc3_fm_0.o_cdr_lock set_interface_property o_tx_pll_locked EXPORT_OF alt_ehipc3_fm_0.o_tx_pll_locked - set_interface_property i_eth_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_addr - set_interface_property i_eth_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_read - set_interface_property i_eth_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_write - set_interface_property o_eth_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata - set_interface_property o_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata_valid - set_interface_property i_eth_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_writedata - set_interface_property o_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_waitrequest - set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address - set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read - set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write - set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata - set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata - set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest - set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref - set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 - set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 - set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 - set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 + set_interface_property eth_reconfig EXPORT_OF alt_ehipc3_fm_0.eth_reconfig set_interface_property i_csr_rst_n EXPORT_OF alt_ehipc3_fm_0.i_csr_rst_n set_interface_property serial_p EXPORT_OF alt_ehipc3_fm_0.serial_p set_interface_property serial_n EXPORT_OF alt_ehipc3_fm_0.serial_n set_interface_property i_reconfig_clk EXPORT_OF alt_ehipc3_fm_0.i_reconfig_clk set_interface_property i_reconfig_reset EXPORT_OF alt_ehipc3_fm_0.i_reconfig_reset + set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_fm_0.i_sl_stats_snapshot + set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_hi_ber + set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_fm_0.o_sl_tx_lanes_stable + set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_pcs_ready + set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_ehip_ready + set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_block_lock + set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_local_fault_status + set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_remote_fault_status set_interface_property i_xcvr_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_address set_interface_property i_xcvr_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_read set_interface_property i_xcvr_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_write set_interface_property o_xcvr_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_readdata set_interface_property i_xcvr_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_writedata set_interface_property o_xcvr_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_waitrequest - set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_fm_0.i_sl_stats_snapshot - set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_hi_ber + set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref + set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 + set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 + set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 + set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 + set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx_tod + set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx_tod + set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address + set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read + set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write + set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata + set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata + set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest set_interface_property i_sl_eth_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_addr set_interface_property i_sl_eth_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_read set_interface_property i_sl_eth_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_write @@ -239,24 +245,17 @@ proc do_create_mac_13 {} { set_interface_property o_sl_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_fm_0.o_sl_eth_reconfig_readdata_valid set_interface_property i_sl_eth_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_writedata set_interface_property o_sl_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_sl_eth_reconfig_waitrequest - set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_fm_0.o_sl_tx_lanes_stable - set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_pcs_ready - set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_ehip_ready - set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_block_lock - set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_local_fault_status - set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_remote_fault_status set_interface_property i_sl_clk_tx EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx set_interface_property i_sl_clk_rx EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx - set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx_tod - set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx_tod set_interface_property i_sl_csr_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_csr_rst_n set_interface_property i_sl_tx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_tx_rst_n set_interface_property i_sl_rx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_rx_rst_n set_interface_property sl_xcvr_fifo_ports EXPORT_OF alt_ehipc3_fm_0.sl_xcvr_fifo_ports set_interface_property sl_nonpcs_ports EXPORT_OF alt_ehipc3_fm_0.sl_nonpcs_ports + set_interface_property ptp_tod_ports_1p5ns_tx EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns_tx + set_interface_property ptp_tod_ports_1p5ns_rx EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns_rx set_interface_property sl_pfc_ports EXPORT_OF alt_ehipc3_fm_0.sl_pfc_ports set_interface_property sl_pause_ports EXPORT_OF alt_ehipc3_fm_0.sl_pause_ports - set_interface_property ptp_tod_ports_1p5ns EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns set_interface_property sl_ptp_ports EXPORT_OF alt_ehipc3_fm_0.sl_ptp_ports set_interface_property sl_ptp_ports_1p5ns EXPORT_OF alt_ehipc3_fm_0.sl_ptp_ports_1p5ns set_interface_property sl_ptp_1step_ports EXPORT_OF alt_ehipc3_fm_0.sl_ptp_1step_ports diff --git a/fpga/mqnic/DE10_Agilex/fpga_25g/ip/25g/mac_rsfec_02.tcl b/fpga/mqnic/DE10_Agilex/fpga_25g/ip/25g/mac_rsfec_02.tcl index d370d4332..195af383a 100644 --- a/fpga/mqnic/DE10_Agilex/fpga_25g/ip/25g/mac_rsfec_02.tcl +++ b/fpga/mqnic/DE10_Agilex/fpga_25g/ip/25g/mac_rsfec_02.tcl @@ -4,6 +4,7 @@ package require -exact qsys 21.3 proc do_create_mac_rsfec_02 {} { # create the system create_system mac_rsfec_02 + set_project_property BOARD {Intel Agilex F-Series FPGA Development Kit DK-DEV-AGF014EA} set_project_property DEVICE {AGFB014R24B2E2V} set_project_property DEVICE_FAMILY {Agilex} set_project_property HIDE_FROM_IP_CATALOG {true} @@ -106,7 +107,10 @@ proc do_create_mac_rsfec_02 {} { set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_include_alternate_ports} {0} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_modulation} {NRZ} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_number_of_channel} {1} + set_instance_parameter_value alt_ehipc3_fm_0 {design_environment} {NATIVE} + set_instance_parameter_value alt_ehipc3_fm_0 {dis_anlt_std_recipe} {0} set_instance_parameter_value alt_ehipc3_fm_0 {disable_internal_dr} {0} + set_instance_parameter_value alt_ehipc3_fm_0 {dr_100g_nrz_pam4} {0} set_instance_parameter_value alt_ehipc3_fm_0 {dr_25g_cpri} {0} set_instance_parameter_value alt_ehipc3_fm_0 {duplex_mode} {enable} set_instance_parameter_value alt_ehipc3_fm_0 {ehip_mode_gui} {MAC+PCS} @@ -201,43 +205,40 @@ proc do_create_mac_rsfec_02 {} { # add the exports set_interface_property o_cdr_lock EXPORT_OF alt_ehipc3_fm_0.o_cdr_lock set_interface_property o_tx_pll_locked EXPORT_OF alt_ehipc3_fm_0.o_tx_pll_locked - set_interface_property i_eth_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_addr - set_interface_property i_eth_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_read - set_interface_property i_eth_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_write - set_interface_property o_eth_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata - set_interface_property o_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata_valid - set_interface_property i_eth_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_writedata - set_interface_property o_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_waitrequest - set_interface_property i_rsfec_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_addr - set_interface_property i_rsfec_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_read - set_interface_property i_rsfec_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_write - set_interface_property o_rsfec_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_rsfec_reconfig_readdata - set_interface_property i_rsfec_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_writedata - set_interface_property o_rsfec_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_rsfec_reconfig_waitrequest - set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address - set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read - set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write - set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata - set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata - set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest - set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref - set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 - set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 - set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 - set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 + set_interface_property eth_reconfig EXPORT_OF alt_ehipc3_fm_0.eth_reconfig + set_interface_property rsfec_reconfig EXPORT_OF alt_ehipc3_fm_0.rsfec_reconfig set_interface_property i_csr_rst_n EXPORT_OF alt_ehipc3_fm_0.i_csr_rst_n set_interface_property serial_p EXPORT_OF alt_ehipc3_fm_0.serial_p set_interface_property serial_n EXPORT_OF alt_ehipc3_fm_0.serial_n set_interface_property i_reconfig_clk EXPORT_OF alt_ehipc3_fm_0.i_reconfig_clk set_interface_property i_reconfig_reset EXPORT_OF alt_ehipc3_fm_0.i_reconfig_reset + set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_fm_0.i_sl_stats_snapshot + set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_hi_ber + set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_fm_0.o_sl_tx_lanes_stable + set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_pcs_ready + set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_ehip_ready + set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_block_lock + set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_local_fault_status + set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_remote_fault_status set_interface_property i_xcvr_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_address set_interface_property i_xcvr_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_read set_interface_property i_xcvr_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_write set_interface_property o_xcvr_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_readdata set_interface_property i_xcvr_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_writedata set_interface_property o_xcvr_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_waitrequest - set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_fm_0.i_sl_stats_snapshot - set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_hi_ber + set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref + set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 + set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 + set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 + set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 + set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx_tod + set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx_tod + set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address + set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read + set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write + set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata + set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata + set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest set_interface_property i_sl_eth_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_addr set_interface_property i_sl_eth_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_read set_interface_property i_sl_eth_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_write @@ -245,24 +246,17 @@ proc do_create_mac_rsfec_02 {} { set_interface_property o_sl_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_fm_0.o_sl_eth_reconfig_readdata_valid set_interface_property i_sl_eth_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_writedata set_interface_property o_sl_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_sl_eth_reconfig_waitrequest - set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_fm_0.o_sl_tx_lanes_stable - set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_pcs_ready - set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_ehip_ready - set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_block_lock - set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_local_fault_status - set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_remote_fault_status set_interface_property i_sl_clk_tx EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx set_interface_property i_sl_clk_rx EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx - set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx_tod - set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx_tod set_interface_property i_sl_csr_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_csr_rst_n set_interface_property i_sl_tx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_tx_rst_n set_interface_property i_sl_rx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_rx_rst_n set_interface_property sl_xcvr_fifo_ports EXPORT_OF alt_ehipc3_fm_0.sl_xcvr_fifo_ports set_interface_property sl_nonpcs_ports EXPORT_OF alt_ehipc3_fm_0.sl_nonpcs_ports + set_interface_property ptp_tod_ports_1p5ns_tx EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns_tx + set_interface_property ptp_tod_ports_1p5ns_rx EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns_rx set_interface_property sl_pfc_ports EXPORT_OF alt_ehipc3_fm_0.sl_pfc_ports set_interface_property sl_pause_ports EXPORT_OF alt_ehipc3_fm_0.sl_pause_ports - set_interface_property ptp_tod_ports_1p5ns EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns set_interface_property sl_ptp_ports EXPORT_OF alt_ehipc3_fm_0.sl_ptp_ports set_interface_property sl_ptp_ports_1p5ns EXPORT_OF alt_ehipc3_fm_0.sl_ptp_ports_1p5ns set_interface_property sl_ptp_1step_ports EXPORT_OF alt_ehipc3_fm_0.sl_ptp_1step_ports diff --git a/fpga/mqnic/DE10_Agilex/fpga_25g/ip/25g/mac_rsfec_13.tcl b/fpga/mqnic/DE10_Agilex/fpga_25g/ip/25g/mac_rsfec_13.tcl index 506d750b7..5ea377f52 100644 --- a/fpga/mqnic/DE10_Agilex/fpga_25g/ip/25g/mac_rsfec_13.tcl +++ b/fpga/mqnic/DE10_Agilex/fpga_25g/ip/25g/mac_rsfec_13.tcl @@ -4,6 +4,7 @@ package require -exact qsys 21.3 proc do_create_mac_rsfec_13 {} { # create the system create_system mac_rsfec_13 + set_project_property BOARD {Intel Agilex F-Series FPGA Development Kit DK-DEV-AGF014EA} set_project_property DEVICE {AGFB014R24B2E2V} set_project_property DEVICE_FAMILY {Agilex} set_project_property HIDE_FROM_IP_CATALOG {true} @@ -106,7 +107,10 @@ proc do_create_mac_rsfec_13 {} { set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_include_alternate_ports} {0} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_modulation} {NRZ} set_instance_parameter_value alt_ehipc3_fm_0 {custom_pcs_number_of_channel} {1} + set_instance_parameter_value alt_ehipc3_fm_0 {design_environment} {NATIVE} + set_instance_parameter_value alt_ehipc3_fm_0 {dis_anlt_std_recipe} {0} set_instance_parameter_value alt_ehipc3_fm_0 {disable_internal_dr} {0} + set_instance_parameter_value alt_ehipc3_fm_0 {dr_100g_nrz_pam4} {0} set_instance_parameter_value alt_ehipc3_fm_0 {dr_25g_cpri} {0} set_instance_parameter_value alt_ehipc3_fm_0 {duplex_mode} {enable} set_instance_parameter_value alt_ehipc3_fm_0 {ehip_mode_gui} {MAC+PCS} @@ -201,43 +205,40 @@ proc do_create_mac_rsfec_13 {} { # add the exports set_interface_property o_cdr_lock EXPORT_OF alt_ehipc3_fm_0.o_cdr_lock set_interface_property o_tx_pll_locked EXPORT_OF alt_ehipc3_fm_0.o_tx_pll_locked - set_interface_property i_eth_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_addr - set_interface_property i_eth_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_read - set_interface_property i_eth_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_write - set_interface_property o_eth_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata - set_interface_property o_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_readdata_valid - set_interface_property i_eth_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_eth_reconfig_writedata - set_interface_property o_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_eth_reconfig_waitrequest - set_interface_property i_rsfec_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_addr - set_interface_property i_rsfec_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_read - set_interface_property i_rsfec_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_write - set_interface_property o_rsfec_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_rsfec_reconfig_readdata - set_interface_property i_rsfec_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_rsfec_reconfig_writedata - set_interface_property o_rsfec_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_rsfec_reconfig_waitrequest - set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address - set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read - set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write - set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata - set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata - set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest - set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref - set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 - set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 - set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 - set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 + set_interface_property eth_reconfig EXPORT_OF alt_ehipc3_fm_0.eth_reconfig + set_interface_property rsfec_reconfig EXPORT_OF alt_ehipc3_fm_0.rsfec_reconfig set_interface_property i_csr_rst_n EXPORT_OF alt_ehipc3_fm_0.i_csr_rst_n set_interface_property serial_p EXPORT_OF alt_ehipc3_fm_0.serial_p set_interface_property serial_n EXPORT_OF alt_ehipc3_fm_0.serial_n set_interface_property i_reconfig_clk EXPORT_OF alt_ehipc3_fm_0.i_reconfig_clk set_interface_property i_reconfig_reset EXPORT_OF alt_ehipc3_fm_0.i_reconfig_reset + set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_fm_0.i_sl_stats_snapshot + set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_hi_ber + set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_fm_0.o_sl_tx_lanes_stable + set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_pcs_ready + set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_ehip_ready + set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_block_lock + set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_local_fault_status + set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_remote_fault_status set_interface_property i_xcvr_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_address set_interface_property i_xcvr_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_read set_interface_property i_xcvr_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_write set_interface_property o_xcvr_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_readdata set_interface_property i_xcvr_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_xcvr_reconfig_writedata set_interface_property o_xcvr_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_xcvr_reconfig_waitrequest - set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_fm_0.i_sl_stats_snapshot - set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_hi_ber + set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_fm_0.i_clk_ref + set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div64 + set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_pll_div66 + set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div64 + set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_fm_0.o_clk_rec_div66 + set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx_tod + set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx_tod + set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_address + set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_read + set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_write + set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_readdata + set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_ptp_reconfig_writedata + set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_ptp_reconfig_waitrequest set_interface_property i_sl_eth_reconfig_addr EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_addr set_interface_property i_sl_eth_reconfig_read EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_read set_interface_property i_sl_eth_reconfig_write EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_write @@ -245,24 +246,17 @@ proc do_create_mac_rsfec_13 {} { set_interface_property o_sl_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_fm_0.o_sl_eth_reconfig_readdata_valid set_interface_property i_sl_eth_reconfig_writedata EXPORT_OF alt_ehipc3_fm_0.i_sl_eth_reconfig_writedata set_interface_property o_sl_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_fm_0.o_sl_eth_reconfig_waitrequest - set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_fm_0.o_sl_tx_lanes_stable - set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_pcs_ready - set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_fm_0.o_sl_ehip_ready - set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_fm_0.o_sl_rx_block_lock - set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_local_fault_status - set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_fm_0.o_sl_remote_fault_status set_interface_property i_sl_clk_tx EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx set_interface_property i_sl_clk_rx EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx - set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_tx_tod - set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_fm_0.i_sl_clk_rx_tod set_interface_property i_sl_csr_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_csr_rst_n set_interface_property i_sl_tx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_tx_rst_n set_interface_property i_sl_rx_rst_n EXPORT_OF alt_ehipc3_fm_0.i_sl_rx_rst_n set_interface_property sl_xcvr_fifo_ports EXPORT_OF alt_ehipc3_fm_0.sl_xcvr_fifo_ports set_interface_property sl_nonpcs_ports EXPORT_OF alt_ehipc3_fm_0.sl_nonpcs_ports + set_interface_property ptp_tod_ports_1p5ns_tx EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns_tx + set_interface_property ptp_tod_ports_1p5ns_rx EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns_rx set_interface_property sl_pfc_ports EXPORT_OF alt_ehipc3_fm_0.sl_pfc_ports set_interface_property sl_pause_ports EXPORT_OF alt_ehipc3_fm_0.sl_pause_ports - set_interface_property ptp_tod_ports_1p5ns EXPORT_OF alt_ehipc3_fm_0.ptp_tod_ports_1p5ns set_interface_property sl_ptp_ports EXPORT_OF alt_ehipc3_fm_0.sl_ptp_ports set_interface_property sl_ptp_ports_1p5ns EXPORT_OF alt_ehipc3_fm_0.sl_ptp_ports_1p5ns set_interface_property sl_ptp_1step_ports EXPORT_OF alt_ehipc3_fm_0.sl_ptp_1step_ports diff --git a/fpga/mqnic/S10DX_DK/fpga_25g/ip/10g/mac.tcl b/fpga/mqnic/S10DX_DK/fpga_25g/ip/10g/mac.tcl index fc7be0249..01e31d165 100644 --- a/fpga/mqnic/S10DX_DK/fpga_25g/ip/10g/mac.tcl +++ b/fpga/mqnic/S10DX_DK/fpga_25g/ip/10g/mac.tcl @@ -4,6 +4,7 @@ package require -exact qsys 21.3 proc do_create_mac {} { # create the system create_system mac + set_project_property BOARD {default} set_project_property DEVICE {1SD280PT2F55E1VG} set_project_property DEVICE_FAMILY {Stratix 10} set_project_property HIDE_FROM_IP_CATALOG {true} @@ -107,7 +108,10 @@ proc do_create_mac {} { set_instance_parameter_value alt_ehipc3_0 {custom_pcs_include_alternate_ports} {0} set_instance_parameter_value alt_ehipc3_0 {custom_pcs_modulation} {NRZ} set_instance_parameter_value alt_ehipc3_0 {custom_pcs_number_of_channel} {1} + set_instance_parameter_value alt_ehipc3_0 {design_environment} {NATIVE} + set_instance_parameter_value alt_ehipc3_0 {dis_anlt_std_recipe} {0} set_instance_parameter_value alt_ehipc3_0 {disable_internal_dr} {0} + set_instance_parameter_value alt_ehipc3_0 {dr_100g_nrz_pam4} {0} set_instance_parameter_value alt_ehipc3_0 {dr_25g_cpri} {0} set_instance_parameter_value alt_ehipc3_0 {duplex_mode} {enable} set_instance_parameter_value alt_ehipc3_0 {ehip_mode_gui} {MAC+PCS} @@ -202,37 +206,37 @@ proc do_create_mac {} { # add the exports set_interface_property o_cdr_lock EXPORT_OF alt_ehipc3_0.o_cdr_lock set_interface_property o_tx_pll_locked EXPORT_OF alt_ehipc3_0.o_tx_pll_locked - set_interface_property i_eth_reconfig_addr EXPORT_OF alt_ehipc3_0.i_eth_reconfig_addr - set_interface_property i_eth_reconfig_read EXPORT_OF alt_ehipc3_0.i_eth_reconfig_read - set_interface_property i_eth_reconfig_write EXPORT_OF alt_ehipc3_0.i_eth_reconfig_write - set_interface_property o_eth_reconfig_readdata EXPORT_OF alt_ehipc3_0.o_eth_reconfig_readdata - set_interface_property o_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_0.o_eth_reconfig_readdata_valid - set_interface_property i_eth_reconfig_writedata EXPORT_OF alt_ehipc3_0.i_eth_reconfig_writedata - set_interface_property o_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_0.o_eth_reconfig_waitrequest - set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_address - set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_read - set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_write - set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_0.o_ptp_reconfig_readdata - set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_writedata - set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_0.o_ptp_reconfig_waitrequest - set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_0.i_clk_ref - set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_0.o_clk_pll_div64 - set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_0.o_clk_pll_div66 - set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_0.o_clk_rec_div64 - set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_0.o_clk_rec_div66 + set_interface_property eth_reconfig EXPORT_OF alt_ehipc3_0.eth_reconfig set_interface_property i_csr_rst_n EXPORT_OF alt_ehipc3_0.i_csr_rst_n set_interface_property serial_p EXPORT_OF alt_ehipc3_0.serial_p set_interface_property serial_n EXPORT_OF alt_ehipc3_0.serial_n set_interface_property i_reconfig_clk EXPORT_OF alt_ehipc3_0.i_reconfig_clk set_interface_property i_reconfig_reset EXPORT_OF alt_ehipc3_0.i_reconfig_reset + set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_0.i_sl_stats_snapshot + set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_0.o_sl_rx_hi_ber + set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_0.o_sl_tx_lanes_stable + set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_0.o_sl_rx_pcs_ready + set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_0.o_sl_ehip_ready + set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_0.o_sl_rx_block_lock + set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_0.o_sl_local_fault_status + set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_0.o_sl_remote_fault_status set_interface_property i_xcvr_reconfig_address EXPORT_OF alt_ehipc3_0.i_xcvr_reconfig_address set_interface_property i_xcvr_reconfig_read EXPORT_OF alt_ehipc3_0.i_xcvr_reconfig_read set_interface_property i_xcvr_reconfig_write EXPORT_OF alt_ehipc3_0.i_xcvr_reconfig_write set_interface_property o_xcvr_reconfig_readdata EXPORT_OF alt_ehipc3_0.o_xcvr_reconfig_readdata set_interface_property i_xcvr_reconfig_writedata EXPORT_OF alt_ehipc3_0.i_xcvr_reconfig_writedata set_interface_property o_xcvr_reconfig_waitrequest EXPORT_OF alt_ehipc3_0.o_xcvr_reconfig_waitrequest - set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_0.i_sl_stats_snapshot - set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_0.o_sl_rx_hi_ber + set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_0.i_clk_ref + set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_0.o_clk_pll_div64 + set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_0.o_clk_pll_div66 + set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_0.o_clk_rec_div64 + set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_0.o_clk_rec_div66 + set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_address + set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_read + set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_write + set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_0.o_ptp_reconfig_readdata + set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_writedata + set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_0.o_ptp_reconfig_waitrequest set_interface_property i_sl_eth_reconfig_addr EXPORT_OF alt_ehipc3_0.i_sl_eth_reconfig_addr set_interface_property i_sl_eth_reconfig_read EXPORT_OF alt_ehipc3_0.i_sl_eth_reconfig_read set_interface_property i_sl_eth_reconfig_write EXPORT_OF alt_ehipc3_0.i_sl_eth_reconfig_write @@ -240,24 +244,19 @@ proc do_create_mac {} { set_interface_property o_sl_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_0.o_sl_eth_reconfig_readdata_valid set_interface_property i_sl_eth_reconfig_writedata EXPORT_OF alt_ehipc3_0.i_sl_eth_reconfig_writedata set_interface_property o_sl_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_0.o_sl_eth_reconfig_waitrequest - set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_0.o_sl_tx_lanes_stable - set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_0.o_sl_rx_pcs_ready - set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_0.o_sl_ehip_ready - set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_0.o_sl_rx_block_lock - set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_0.o_sl_local_fault_status - set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_0.o_sl_remote_fault_status set_interface_property i_sl_clk_tx EXPORT_OF alt_ehipc3_0.i_sl_clk_tx set_interface_property i_sl_clk_rx EXPORT_OF alt_ehipc3_0.i_sl_clk_rx - set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_0.i_sl_clk_tx_tod - set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_0.i_sl_clk_rx_tod set_interface_property i_sl_csr_rst_n EXPORT_OF alt_ehipc3_0.i_sl_csr_rst_n set_interface_property i_sl_tx_rst_n EXPORT_OF alt_ehipc3_0.i_sl_tx_rst_n set_interface_property i_sl_rx_rst_n EXPORT_OF alt_ehipc3_0.i_sl_rx_rst_n + set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_0.i_sl_clk_tx_tod + set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_0.i_sl_clk_rx_tod set_interface_property sl_xcvr_fifo_ports EXPORT_OF alt_ehipc3_0.sl_xcvr_fifo_ports set_interface_property sl_nonpcs_ports EXPORT_OF alt_ehipc3_0.sl_nonpcs_ports + set_interface_property ptp_tod_ports_1p5ns_tx EXPORT_OF alt_ehipc3_0.ptp_tod_ports_1p5ns_tx + set_interface_property ptp_tod_ports_1p5ns_rx EXPORT_OF alt_ehipc3_0.ptp_tod_ports_1p5ns_rx set_interface_property sl_pfc_ports EXPORT_OF alt_ehipc3_0.sl_pfc_ports set_interface_property sl_pause_ports EXPORT_OF alt_ehipc3_0.sl_pause_ports - set_interface_property ptp_tod_ports_1p5ns EXPORT_OF alt_ehipc3_0.ptp_tod_ports_1p5ns set_interface_property sl_ptp_ports EXPORT_OF alt_ehipc3_0.sl_ptp_ports set_interface_property sl_ptp_ports_1p5ns EXPORT_OF alt_ehipc3_0.sl_ptp_ports_1p5ns set_interface_property sl_ptp_1step_ports EXPORT_OF alt_ehipc3_0.sl_ptp_1step_ports diff --git a/fpga/mqnic/S10DX_DK/fpga_25g/ip/25g/mac_rsfec.tcl b/fpga/mqnic/S10DX_DK/fpga_25g/ip/25g/mac_rsfec.tcl index d8dfc147b..111d4f41b 100644 --- a/fpga/mqnic/S10DX_DK/fpga_25g/ip/25g/mac_rsfec.tcl +++ b/fpga/mqnic/S10DX_DK/fpga_25g/ip/25g/mac_rsfec.tcl @@ -4,6 +4,7 @@ package require -exact qsys 21.3 proc do_create_mac_rsfec {} { # create the system create_system mac_rsfec + set_project_property BOARD {default} set_project_property DEVICE {1SD280PT2F55E1VG} set_project_property DEVICE_FAMILY {Stratix 10} set_project_property HIDE_FROM_IP_CATALOG {true} @@ -107,7 +108,10 @@ proc do_create_mac_rsfec {} { set_instance_parameter_value alt_ehipc3_0 {custom_pcs_include_alternate_ports} {0} set_instance_parameter_value alt_ehipc3_0 {custom_pcs_modulation} {NRZ} set_instance_parameter_value alt_ehipc3_0 {custom_pcs_number_of_channel} {1} + set_instance_parameter_value alt_ehipc3_0 {design_environment} {NATIVE} + set_instance_parameter_value alt_ehipc3_0 {dis_anlt_std_recipe} {0} set_instance_parameter_value alt_ehipc3_0 {disable_internal_dr} {0} + set_instance_parameter_value alt_ehipc3_0 {dr_100g_nrz_pam4} {0} set_instance_parameter_value alt_ehipc3_0 {dr_25g_cpri} {0} set_instance_parameter_value alt_ehipc3_0 {duplex_mode} {enable} set_instance_parameter_value alt_ehipc3_0 {ehip_mode_gui} {MAC+PCS} @@ -202,43 +206,38 @@ proc do_create_mac_rsfec {} { # add the exports set_interface_property o_cdr_lock EXPORT_OF alt_ehipc3_0.o_cdr_lock set_interface_property o_tx_pll_locked EXPORT_OF alt_ehipc3_0.o_tx_pll_locked - set_interface_property i_eth_reconfig_addr EXPORT_OF alt_ehipc3_0.i_eth_reconfig_addr - set_interface_property i_eth_reconfig_read EXPORT_OF alt_ehipc3_0.i_eth_reconfig_read - set_interface_property i_eth_reconfig_write EXPORT_OF alt_ehipc3_0.i_eth_reconfig_write - set_interface_property o_eth_reconfig_readdata EXPORT_OF alt_ehipc3_0.o_eth_reconfig_readdata - set_interface_property o_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_0.o_eth_reconfig_readdata_valid - set_interface_property i_eth_reconfig_writedata EXPORT_OF alt_ehipc3_0.i_eth_reconfig_writedata - set_interface_property o_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_0.o_eth_reconfig_waitrequest - set_interface_property i_rsfec_reconfig_addr EXPORT_OF alt_ehipc3_0.i_rsfec_reconfig_addr - set_interface_property i_rsfec_reconfig_read EXPORT_OF alt_ehipc3_0.i_rsfec_reconfig_read - set_interface_property i_rsfec_reconfig_write EXPORT_OF alt_ehipc3_0.i_rsfec_reconfig_write - set_interface_property o_rsfec_reconfig_readdata EXPORT_OF alt_ehipc3_0.o_rsfec_reconfig_readdata - set_interface_property i_rsfec_reconfig_writedata EXPORT_OF alt_ehipc3_0.i_rsfec_reconfig_writedata - set_interface_property o_rsfec_reconfig_waitrequest EXPORT_OF alt_ehipc3_0.o_rsfec_reconfig_waitrequest - set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_address - set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_read - set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_write - set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_0.o_ptp_reconfig_readdata - set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_writedata - set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_0.o_ptp_reconfig_waitrequest - set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_0.i_clk_ref - set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_0.o_clk_pll_div64 - set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_0.o_clk_pll_div66 - set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_0.o_clk_rec_div64 - set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_0.o_clk_rec_div66 + set_interface_property eth_reconfig EXPORT_OF alt_ehipc3_0.eth_reconfig + set_interface_property rsfec_reconfig EXPORT_OF alt_ehipc3_0.rsfec_reconfig set_interface_property i_csr_rst_n EXPORT_OF alt_ehipc3_0.i_csr_rst_n set_interface_property serial_p EXPORT_OF alt_ehipc3_0.serial_p set_interface_property serial_n EXPORT_OF alt_ehipc3_0.serial_n set_interface_property i_reconfig_clk EXPORT_OF alt_ehipc3_0.i_reconfig_clk set_interface_property i_reconfig_reset EXPORT_OF alt_ehipc3_0.i_reconfig_reset + set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_0.i_sl_stats_snapshot + set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_0.o_sl_rx_hi_ber + set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_0.o_sl_tx_lanes_stable + set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_0.o_sl_rx_pcs_ready + set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_0.o_sl_ehip_ready + set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_0.o_sl_rx_block_lock + set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_0.o_sl_local_fault_status + set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_0.o_sl_remote_fault_status set_interface_property i_xcvr_reconfig_address EXPORT_OF alt_ehipc3_0.i_xcvr_reconfig_address set_interface_property i_xcvr_reconfig_read EXPORT_OF alt_ehipc3_0.i_xcvr_reconfig_read set_interface_property i_xcvr_reconfig_write EXPORT_OF alt_ehipc3_0.i_xcvr_reconfig_write set_interface_property o_xcvr_reconfig_readdata EXPORT_OF alt_ehipc3_0.o_xcvr_reconfig_readdata set_interface_property i_xcvr_reconfig_writedata EXPORT_OF alt_ehipc3_0.i_xcvr_reconfig_writedata set_interface_property o_xcvr_reconfig_waitrequest EXPORT_OF alt_ehipc3_0.o_xcvr_reconfig_waitrequest - set_interface_property i_sl_stats_snapshot EXPORT_OF alt_ehipc3_0.i_sl_stats_snapshot - set_interface_property o_sl_rx_hi_ber EXPORT_OF alt_ehipc3_0.o_sl_rx_hi_ber + set_interface_property i_clk_ref EXPORT_OF alt_ehipc3_0.i_clk_ref + set_interface_property o_clk_pll_div64 EXPORT_OF alt_ehipc3_0.o_clk_pll_div64 + set_interface_property o_clk_pll_div66 EXPORT_OF alt_ehipc3_0.o_clk_pll_div66 + set_interface_property o_clk_rec_div64 EXPORT_OF alt_ehipc3_0.o_clk_rec_div64 + set_interface_property o_clk_rec_div66 EXPORT_OF alt_ehipc3_0.o_clk_rec_div66 + set_interface_property i_ptp_reconfig_address EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_address + set_interface_property i_ptp_reconfig_read EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_read + set_interface_property i_ptp_reconfig_write EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_write + set_interface_property o_ptp_reconfig_readdata EXPORT_OF alt_ehipc3_0.o_ptp_reconfig_readdata + set_interface_property i_ptp_reconfig_writedata EXPORT_OF alt_ehipc3_0.i_ptp_reconfig_writedata + set_interface_property o_ptp_reconfig_waitrequest EXPORT_OF alt_ehipc3_0.o_ptp_reconfig_waitrequest set_interface_property i_sl_eth_reconfig_addr EXPORT_OF alt_ehipc3_0.i_sl_eth_reconfig_addr set_interface_property i_sl_eth_reconfig_read EXPORT_OF alt_ehipc3_0.i_sl_eth_reconfig_read set_interface_property i_sl_eth_reconfig_write EXPORT_OF alt_ehipc3_0.i_sl_eth_reconfig_write @@ -246,24 +245,19 @@ proc do_create_mac_rsfec {} { set_interface_property o_sl_eth_reconfig_readdata_valid EXPORT_OF alt_ehipc3_0.o_sl_eth_reconfig_readdata_valid set_interface_property i_sl_eth_reconfig_writedata EXPORT_OF alt_ehipc3_0.i_sl_eth_reconfig_writedata set_interface_property o_sl_eth_reconfig_waitrequest EXPORT_OF alt_ehipc3_0.o_sl_eth_reconfig_waitrequest - set_interface_property o_sl_tx_lanes_stable EXPORT_OF alt_ehipc3_0.o_sl_tx_lanes_stable - set_interface_property o_sl_rx_pcs_ready EXPORT_OF alt_ehipc3_0.o_sl_rx_pcs_ready - set_interface_property o_sl_ehip_ready EXPORT_OF alt_ehipc3_0.o_sl_ehip_ready - set_interface_property o_sl_rx_block_lock EXPORT_OF alt_ehipc3_0.o_sl_rx_block_lock - set_interface_property o_sl_local_fault_status EXPORT_OF alt_ehipc3_0.o_sl_local_fault_status - set_interface_property o_sl_remote_fault_status EXPORT_OF alt_ehipc3_0.o_sl_remote_fault_status set_interface_property i_sl_clk_tx EXPORT_OF alt_ehipc3_0.i_sl_clk_tx set_interface_property i_sl_clk_rx EXPORT_OF alt_ehipc3_0.i_sl_clk_rx - set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_0.i_sl_clk_tx_tod - set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_0.i_sl_clk_rx_tod set_interface_property i_sl_csr_rst_n EXPORT_OF alt_ehipc3_0.i_sl_csr_rst_n set_interface_property i_sl_tx_rst_n EXPORT_OF alt_ehipc3_0.i_sl_tx_rst_n set_interface_property i_sl_rx_rst_n EXPORT_OF alt_ehipc3_0.i_sl_rx_rst_n + set_interface_property i_sl_clk_tx_tod EXPORT_OF alt_ehipc3_0.i_sl_clk_tx_tod + set_interface_property i_sl_clk_rx_tod EXPORT_OF alt_ehipc3_0.i_sl_clk_rx_tod set_interface_property sl_xcvr_fifo_ports EXPORT_OF alt_ehipc3_0.sl_xcvr_fifo_ports set_interface_property sl_nonpcs_ports EXPORT_OF alt_ehipc3_0.sl_nonpcs_ports + set_interface_property ptp_tod_ports_1p5ns_tx EXPORT_OF alt_ehipc3_0.ptp_tod_ports_1p5ns_tx + set_interface_property ptp_tod_ports_1p5ns_rx EXPORT_OF alt_ehipc3_0.ptp_tod_ports_1p5ns_rx set_interface_property sl_pfc_ports EXPORT_OF alt_ehipc3_0.sl_pfc_ports set_interface_property sl_pause_ports EXPORT_OF alt_ehipc3_0.sl_pause_ports - set_interface_property ptp_tod_ports_1p5ns EXPORT_OF alt_ehipc3_0.ptp_tod_ports_1p5ns set_interface_property sl_ptp_ports EXPORT_OF alt_ehipc3_0.sl_ptp_ports set_interface_property sl_ptp_ports_1p5ns EXPORT_OF alt_ehipc3_0.sl_ptp_ports_1p5ns set_interface_property sl_ptp_1step_ports EXPORT_OF alt_ehipc3_0.sl_ptp_1step_ports