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4 Commits

Author SHA1 Message Date
Alex Forencich
ba55a3c1ed fpga/mqnic: Fix AXIL_CSR_ADDR_WIDTH parameter 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-11-28 18:57:10 -08:00
Alex Forencich
c61bbd6f0d fpga/mqnic: Clean up IO constraints for Intel devices 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-11-19 21:15:05 -08:00
Alex Forencich
b4febeb78e fpga/mqnic: Add missing PTP clock connections 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-11-19 19:52:09 -08:00
Alex Forencich
a7753da72e Add support for BittWare IA-420F 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-11-19 19:51:12 -08:00