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3,255 Commits 1 Branch 0 Tags
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925 Commits

Author SHA1 Message Date
Alex Forencich
0ad2635b76 fpga/mqnic/ZCU102: Update device tree for PetaLinux 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-06-02 23:13:28 -07:00
Alex Forencich
a8c60e89ac fpga/mqnic/KR260: Add 10G mqnic design for Kria KR260 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-06-02 02:05:30 -07:00
Alex Forencich
2f134d1968 fpga/mqnic/ZCU102/fpga_zynqmp: Add support for Ubuntu for ZCU102 MPSoC 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-06-02 01:53:59 -07:00
Alex Forencich
beaf1c6fbf fpga/mqnic/ZCU106/fpga_zynqmp: Add support for Ubuntu for ZCU106 MPSoC 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-06-02 01:53:24 -07:00
Alex Forencich
64cdae1ccf fpga: Update designs for RX completion buffer management 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-05-31 10:26:40 -07:00
Alex Forencich
c45be17cea fpga/common: Add busy status outputs to DMA IF instances 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-05-30 21:27:56 -07:00
Alex Forencich
ffe158f43c merged changes in pcie 2023-05-30 21:27:16 -07:00
Alex Forencich
cde909061c merged changes in eth 2023-05-21 14:53:37 -07:00
Alex Forencich
eb3343764d fpga/mqnic/DK_DEV_1SDX_P_A: Parameter clean-up 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-05-21 14:53:30 -07:00
Alex Forencich
47cfc828a2 fpga/mqnic/ADM_PCIE_9V3: Parameter clean-up, remove PCIE_TAG_COUNT from top level 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-05-19 13:34:33 -07:00
Alex Forencich
b7dad0e946 fpga/common/tb: Check feature bits in core testbenches 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-05-13 01:10:35 -07:00
Alex Forencich
1c242f7d92 fpga/common/tb: Pull out feature bits for easy access 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-05-13 00:54:56 -07:00
Alex Forencich
3c995dc8e0 Implement dynamic queue allocation in testbench and driver 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-05-02 21:23:30 -07:00
Alex Forencich
9834f8365c Rework resource management in testbenches, driver, and utils 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-05-01 22:04:43 -07:00
Alex Forencich
66f5b9fcc1 Clean up naming in testbenches, driver, and utils 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-30 21:48:34 -07:00
Alex Forencich
53d272ff12 fpga/mqnic/fb4CGg3: Add 25G mqnic design for Silicom fb4CGg3@VU09P 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-30 13:55:58 -07:00
Alex Forencich
341115d70b fpga/mqnic/fb4CGg3: Add 100G mqnic design for Silicom fb4CGg3@VU09P 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-30 13:51:57 -07:00
Alex Forencich
519330fd32 fpga: Move led_sreg_driver into common 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-27 14:12:42 -07:00
Alex Forencich
462d3c3a65 fpga/mqnic/fb2CG: Update led_sreg_driver to support interleaving and bit reversal 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-27 01:03:44 -07:00
Alex Forencich
04d137ffbc fpga/mqnic/DK_DEV_AGF014EA: Add notes on switch settings 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-22 22:10:02 -07:00
Alex Forencich
587b4d5743 fpga/mqnic/DK_DEV_1SDX_P_A: Add 100G mqnic design for DK-DEV-1SDX-P-A 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-22 22:07:32 -07:00
Alex Forencich
0634b86539 fpga/mqnic/DK_DEV_1SDX_P_A: Implement I2C interface on DK-DEV-1SDX-P-A 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-22 20:24:50 -07:00
Alex Forencich
52068fbb31 fpga/mqnic: Rename Intel development kit designs based on part number 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-20 21:51:35 -07:00
Alex Forencich
526bcdb7b1 fpga/mqnic/DK_DEV_AGF014EA: Add 25G mqnic design for DK-DEV-AGF014EA 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-16 01:11:11 -07:00
Alex Forencich
19cbfeccaa fpga/mqnic/DK_DEV_AGF014EA: Add 100G mqnic design for DK-DEV-AGF014EA 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-16 01:10:43 -07:00
Alex Forencich
f4c016a46c fpga/mqnic/DE10-Agilex: Drop part suffix for production parts 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-15 16:56:10 -07:00
Alex Forencich
14be62110e fpga/mqnic: Write compressed SOF files 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-15 16:29:37 -07:00
Alex Forencich
adeb6d7a11 fpga/mqnic/DE10_Agilex: Report correct FPGA IDs 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-15 16:26:39 -07:00
Alex Forencich
a3319d50b6 fpga/mqnic: Implement workaround for Quartus MLAB RAM read enable bug 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-14 01:21:36 -07:00
Alex Forencich
95af2136b1 fpga/common: Increase event FIFO size 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-14 01:03:19 -07:00
Alex Forencich
bb158d568f Add RX indirection table 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-10 15:05:32 -07:00
Alex Forencich
30379cd8a3 Add phase tag to events and completions to avoid queue pointer reads 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-06 20:43:13 -07:00
Alex Forencich
54b3c8199c fpga/common: Add re-arm bit in tail pointer register in completion queue manager 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-06 16:58:50 -07:00
Alex Forencich
04ede2e535 fpga/common: Update port timing constraints to not mark ASYNC_REG on the first flip flop in the status sync chains for better placement flexibility 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-06 14:34:22 -07:00
Alex Forencich
c273b7f4ad mqnic: Register MIG resets 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-05 17:06:57 -07:00
Alex Forencich
394dc2d723 fpga/common: Add phase bit to queue managers 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-05 01:38:46 -07:00
Alex Forencich
a8feaf2383 Advance TX/RX queue pointers based on completion records instead of MMIO reads 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-04 22:12:32 -07:00
Alex Forencich
d06fbaf178 fpga/common/tb: Rework driver model to better match C code 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-03-31 17:44:06 -07:00
Alex Forencich
ec1d7fe904 fpga/common/tb: Remove old interrupt handler 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-03-31 16:58:53 -07:00
Alex Forencich
f54fe4100a fpga/mqnic: Update Intel IP TCL files for E-Tile 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-03-30 13:50:59 -07:00
Alex Forencich
047b1a4cec merged changes in axi 2023-03-30 00:13:02 -07:00
Alex Forencich
dd07e65330 fpga/mqnic/XUPP3R: Fix placement constraints 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-03-30 00:10:59 -07:00
Alex Forencich
3d06b34679 fpga: Add DRAM bandwidth test to DMA benchmark application 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-03-29 14:27:46 -07:00
Alex Forencich
d6bac395f3 fpga/app/dma_bench: Add DRAM test channel module 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-03-29 14:23:52 -07:00
Alex Forencich
4245317b15 merged changes in axi 2023-03-28 22:01:15 -07:00
Alex Forencich
223c6c020d fpga/common: Add DRAM/HBM to core testbenches 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-03-27 18:12:50 -07:00
Alex Forencich
b9945d3986 fpga/common: Pull out core_inst to simplify setup 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-03-26 23:18:55 -07:00
Alex Forencich
7c6c39e446 fpga/mqnic: Move implementation strategy setting into config.tcl 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-03-24 00:40:12 -07:00
Alex Forencich
554369b33b fpga/mqnic: Update makefile path handling 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-03-24 00:39:45 -07:00
Alex Forencich
853dca8c4c fpga/mqnic: Always create SLR pblocks 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-03-24 00:39:18 -07:00