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12 Commits

Author SHA1 Message Date
Alex Forencich
448fa8eb4c Use SPDX
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-06-26 11:44:57 -07:00
Alex Forencich
c5003d0c6d fpga/mqnic: Select advanced mode for Xilinx PCIe IP core config to access MSI-X settings
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2022-12-03 15:35:16 -08:00
Alex Forencich
39c5744e99 Use CMAC wrapper in 100G mqnic design for Alveo U280
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2022-11-10 16:30:55 -08:00
Alex Forencich
5e52a52f5e fpga/mqnic: Add MIGs and HBM controllers for most boards
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2022-10-12 19:00:49 -07:00
Alex Forencich
729c3a0458 Update for PCIe shim changes, enable TLP straddling on US/US+ devices, and use 256 tags on US+ devices
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2022-07-08 22:07:18 -07:00
Alex Forencich
21b0f014a5 Switch to MSI-X
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2022-06-02 23:58:29 -07:00
Alex Forencich
38c85a6bcd Set subsystem ID based on board, remove unnecessary configuration settings 2021-11-02 15:32:55 -07:00
Alex Forencich
4ed99c6f87 Remove CMS IP version number 2021-07-03 00:09:10 -07:00
Alex Forencich
2975e075d4 Add PTP support at 100G on Alveo U280 2021-04-01 16:31:23 -07:00
Alex Forencich
89d7042aeb Add CMS IP to all Alveo designs 2021-01-31 14:17:49 -08:00
Alex Forencich
d449be8fc5 Convert to 64 bit BARs 2020-07-24 16:54:57 -07:00
Alex Forencich
9b7fa688d5 Add 100G mqnic design for Alveo U280 2020-07-12 11:33:28 -07:00