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402 Commits 1 Branch 0 Tags
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20 Commits

Author SHA1 Message Date
Alex Forencich
068ea6edc2 Add example design for Alveo U280 2021-11-18 16:27:48 -08:00
Alex Forencich
6920845989 Update example design testbenches 2021-11-17 17:21:57 -08:00
Alex Forencich
47a2570647 Set class code to memory controller, set subsystem ID based on board 2021-11-02 14:39:33 -07:00
Alex Forencich
90959b8795 Add default_nettype none and resetall directives 2021-10-20 17:49:30 -07:00
Alex Forencich
a7b669e22f Update makefiles 2021-10-01 02:39:15 -07:00
Alex Forencich
14c84088ee Reorganize driver code 2021-08-13 14:22:32 -07:00
Alex Forencich
e4508b242f Update example designs 2021-08-02 18:36:25 -07:00
Alex Forencich
ccc44d7dbb Use 64 bit BARs in example designs 2021-06-16 23:23:53 -07:00
Alex Forencich
bdfeaa84ca Update testbenches 2021-03-06 20:06:23 -08:00
Alex Forencich
266fed8d20 Update example design file list 2021-02-28 19:35:35 -08:00
Alex Forencich
062495b780 Remove redundant parameter PCIE_EXT_TAG_ENABLE 2021-02-25 18:20:08 -08:00
Alex Forencich
8294eecd65 Remove redundant parameter PCIE_TAG_WIDTH 2021-02-25 18:10:59 -08:00
Alex Forencich
633b47ef7f Update XDC files 2021-02-06 17:14:26 -08:00
Alex Forencich
87a6efe05c Rework sim_build output directory, fix default makefile target 2020-12-29 16:26:48 -08:00
Alex Forencich
cabad17552 Migrate example design testbenches to cocotb 2020-12-18 22:10:32 -08:00
Alex Forencich
5546e40812 Fix user_clk_frequency setting in testbenches 2020-10-12 23:05:28 -07:00
Alex Forencich
3ce28df7e0 Update flash programming commands 2020-09-29 18:28:38 -07:00
Alex Forencich
b79ddf5ebd Update makefiles 2020-08-06 18:22:30 -07:00
Alex Forencich
d3a1c903d3 XDC clean up 2020-07-13 23:58:45 -07:00
Alex Forencich
5dbb771958 Add AU280 AXI example design 2020-07-12 11:42:48 -07:00