Alex Forencich
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c6c83a7c68
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Remove recursively-expanded macros for module parameters in makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-17 15:58:34 -08:00 |
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Alex Forencich
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9c5c6e6edf
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Rework parameter handling in example design makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-29 22:56:53 -08:00 |
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Alex Forencich
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91450fcab7
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PCIe flow control is handled in shim; remove flow control from PCIe DMA interface
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-08-03 13:47:02 -07:00 |
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Alex Forencich
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9c434687a8
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Add flow control credit counter to TLP FIFO MUX module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-31 17:35:07 -07:00 |
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Alex Forencich
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5fe904545c
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Testbench cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-13 16:35:51 -07:00 |
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Alex Forencich
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3f334dbbbb
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Use MSI-X in example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-12 23:32:51 -07:00 |
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Alex Forencich
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a44f9852c2
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Update Stratix 10 H-tile/L-tile shim to support segments
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-02 23:48:46 -07:00 |
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Alex Forencich
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ba5188dd93
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Update testbenches for new version of cocotbext-pcie
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-06-02 23:33:52 -07:00 |
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Alex Forencich
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0b815522b0
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Sync example design testbenches
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-20 00:43:55 -07:00 |
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Alex Forencich
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e4b1df0ddb
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Fix immediate enable register implementation in example design
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-20 00:43:21 -07:00 |
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Alex Forencich
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e7a83364d0
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Update testbenches
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2022-04-04 15:05:21 -07:00 |
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Alex Forencich
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667076ee39
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Testbench cleanup
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2021-11-18 13:50:32 -08:00 |
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Alex Forencich
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6920845989
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Update example design testbenches
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2021-11-17 17:21:57 -08:00 |
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Alex Forencich
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f4ffdb727d
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Add example design for BittWare 520N-MX
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2021-11-03 18:13:40 -07:00 |
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