Alex Forencich
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0afe9be906
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fpga/mqnic/VCU108: Update VCU108 design to support 25G
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-26 23:26:11 -07:00 |
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Alex Forencich
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6a29073aa6
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fpga/mqnic/S10MX_DK: Update S10MX dev kit design to support 25G
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-25 21:25:21 -07:00 |
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Alex Forencich
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2c602b6368
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Add 25g mqnic design for Stratix 10 DX dev kit
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-23 19:42:58 -07:00 |
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Alex Forencich
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ec17500a66
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Add 100G mqnic design for DE10-Agilex
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-21 18:49:35 -07:00 |
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Alex Forencich
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03a49d7bc6
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Add 25G mqnic design for DE10-Agilex
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-19 23:43:22 -07:00 |
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Alex Forencich
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84c6eb95a6
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Update docs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-18 22:27:08 -07:00 |
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Alex Forencich
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4cdb57bfe1
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Update module documentation
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2022-05-23 21:23:13 -07:00 |
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Alex Forencich
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9653caf09b
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Add 25G mqnic design for Cisco Nexus K3P-Q
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2022-05-09 14:02:13 -07:00 |
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Alex Forencich
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ba9ef590b7
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Use Cisco Nexus part numbers for Cisco Nexus boards
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-05-09 13:43:47 -07:00 |
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Alex Forencich
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c2fea3a616
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Add port register blocks with support for PHY link status reporting
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-05-04 09:03:37 -07:00 |
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Alex Forencich
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2bd8350276
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Add RX queue mapping module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-23 00:12:22 -07:00 |
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Alex Forencich
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7f8bbe30de
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Add application ID
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-21 13:15:45 -07:00 |
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Alex Forencich
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ba70498518
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fpga: Add DMA immediate connections and parameters
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-20 15:00:58 -07:00 |
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Alex Forencich
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5bc569c469
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Update device lists
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-16 12:34:29 -07:00 |
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Alex Forencich
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eb530475fb
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More expressive flash format register
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-15 18:38:01 -07:00 |
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Alex Forencich
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1d9c63ec66
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docs: Update device lists
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-09 23:04:16 -07:00 |
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Alex Forencich
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1797fdecec
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docs: Fix table
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-07 22:42:47 -07:00 |
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Alex Forencich
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59e4c73252
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docs: Add SoC section to device list
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-07 22:41:43 -07:00 |
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Joachim Foerster
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4250bde2a3
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docs/source/: Add section about PetaLinux tools
Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
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2022-04-07 18:41:05 +02:00 |
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Alex Forencich
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f082196b4a
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Expose EVENT_QUEUE_INDEX_WIDTH parameter at top-level
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2022-03-29 23:15:06 -07:00 |
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Alex Forencich
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4310c3e0e7
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Pass SCHED_PER_IF and PTP_PORT_CDC_PIPELINE parameters through to application block
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2022-03-28 21:57:53 -07:00 |
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Alex Forencich
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a98443a95b
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Update parameter documentation
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2022-03-28 21:55:04 -07:00 |
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Alex Forencich
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cbd9d0dfc6
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Expose port and scheduler block counts in IF control block; update driver model, driver, and userspace tools to handle scheduler blocks separately from ports
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2022-03-28 17:23:27 -07:00 |
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Alex Forencich
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fca0b080a0
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Improve performance tuning section relating to NUMA
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2022-03-24 00:51:43 -07:00 |
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Alex Forencich
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0a385385d4
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Update list of designs
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2022-03-15 17:56:02 -07:00 |
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Alex Forencich
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4fc7e0b9d8
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Use rsvg instead of inkscape for SVG conversion
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2022-03-14 00:47:27 -07:00 |
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Alex Forencich
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df8f3de64f
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Add requirements.txt for sphinx
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2022-03-13 23:40:25 -07:00 |
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Alex Forencich
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1647377eb9
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Update sphinx config
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2022-03-13 23:35:14 -07:00 |
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Alex Forencich
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1e601cff56
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Initial commit of sphinx documentation
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2022-03-13 23:32:01 -07:00 |
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