Alex Forencich
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1486da601f
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fpga: Add clock period parameters
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-09-04 12:03:35 -07:00 |
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Alex Forencich
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84c6eb95a6
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Update docs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-18 22:27:08 -07:00 |
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Alex Forencich
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4cdb57bfe1
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Update module documentation
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2022-05-23 21:23:13 -07:00 |
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Alex Forencich
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7f8bbe30de
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Add application ID
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-21 13:15:45 -07:00 |
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Alex Forencich
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ba70498518
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fpga: Add DMA immediate connections and parameters
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-20 15:00:58 -07:00 |
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Alex Forencich
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f082196b4a
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Expose EVENT_QUEUE_INDEX_WIDTH parameter at top-level
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2022-03-29 23:15:06 -07:00 |
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Alex Forencich
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a98443a95b
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Update parameter documentation
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2022-03-28 21:55:04 -07:00 |
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Alex Forencich
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1e601cff56
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Initial commit of sphinx documentation
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2022-03-13 23:32:01 -07:00 |
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