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239 Commits

Author SHA1 Message Date
Alex Forencich
c65161e696 Remove recursively-expanded macros for module parameters in makefiles 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-02-17 16:04:16 -08:00
Alex Forencich
57803eeeb8 Remove deprecated assignments 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-01-24 15:07:45 -08:00
Alex Forencich
7a0e88ffea Update vivado.mk 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-01-13 14:57:46 -08:00
Alex Forencich
f3d5e74527 Add RV901T example design 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-01-01 22:03:14 -08:00
Alex Forencich
8c3df76b97 Fix signal name 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-12-27 18:26:58 -08:00
Alex Forencich
1f80696b55 Use start_soon instead of fork 2021-12-10 18:19:11 -08:00
Alex Forencich
8e60adf567 Update axis_switch instances 2021-11-29 14:43:01 -08:00
Alex Forencich
d052264659 Add 520N-MX 10G example design 2021-11-03 00:48:06 -07:00
Alex Forencich
9e44987f60 Reorganize PHY instances 2021-11-02 23:30:48 -07:00
Alex Forencich
728e86c554 Update QSF/SDC files 2021-11-02 23:30:06 -07:00
Alex Forencich
74f32c6a59 Add missing PHY instance ports 2021-11-02 20:28:26 -07:00
Alex Forencich
6b18e56cb1 Add default_nettype none and resetall directives 2021-10-20 17:29:12 -07:00
Alex Forencich
9ff4454db0 Update makefiles 2021-10-20 17:21:58 -07:00
Alex Forencich
0f2478d68c Fix wires 2021-10-20 17:21:16 -07:00
Alex Forencich
9f6f388a3c Rework GT instances in HTG9200 design 2021-10-20 00:57:11 -07:00
Alex Forencich
527c2f1b89 Rework GT instances in fb2CG@KU15P design 2021-10-20 00:56:13 -07:00
Alex Forencich
05770c5a1b Rework GT instances in VCU118 designs 2021-10-19 22:13:02 -07:00
Alex Forencich
531f751e67 Update VCU118 XDC 2021-10-19 22:11:56 -07:00
Alex Forencich
cf016dc4ee Rework GT instances in VCU108 design 2021-10-19 22:11:34 -07:00
Alex Forencich
1f76eb4534 Update VCU108 XDC 2021-10-19 22:10:32 -07:00
Alex Forencich
a1da0ba184 Rework GT instances in VCU1525 design 2021-10-19 18:40:32 -07:00
Alex Forencich
0b41dc4011 Rework GT instances in ZCU102 design 2021-10-19 18:38:22 -07:00
Alex Forencich
e3f8879474 Rework GT instances in ZCU106 design 2021-10-19 18:30:35 -07:00
Alex Forencich
4ce218bc5d Rework GT instances in ADM-PCIE-9V3 designs 2021-10-19 18:29:18 -07:00
Alex Forencich
21da6f58dc Rework GT instances in Alveo U280 design 2021-10-19 18:28:10 -07:00
Alex Forencich
4fdc6408bc Rework GT instances in Alveo U50 design 2021-10-19 18:14:50 -07:00
Alex Forencich
cc4256666a Rework GT instances in Alveo U250 design 2021-10-19 17:47:15 -07:00
Alex Forencich
f11f7ecac9 Rework GT instances in Alveo U200 design 2021-10-19 17:45:43 -07:00
Alex Forencich
38e3244caa Rework GT instances in ExaNIC X10 design 2021-10-18 00:34:06 -07:00
Alex Forencich
fa77fe54f3 Rework GT instances in ExaNIC X25 design 2021-10-18 00:32:37 -07:00
Alex Forencich
4aa672f8f3 Update example designs 2021-10-17 20:20:26 -07:00
Alex Forencich
4c14289fb0 Fix instance name 2021-10-13 14:43:42 -07:00
Alex Forencich
e85deafca3 Update FIFO instance 2021-10-13 14:42:57 -07:00
Alex Forencich
29313d5e02 Add HTG-9200 10G example design 2021-07-08 11:58:04 -07:00
Alex Forencich
97182ccf4e Update vivado.mk 2021-06-23 20:07:29 -07:00
Alex Forencich
5415c41c41 Remove string parameters 2021-06-02 17:50:26 -07:00
Alex Forencich
b09e01ba48 Update S10MX SDC 2021-05-19 21:57:48 -07:00
Alex Forencich
cee82cb695 Add Stratix 10 DX 10G example design 2021-05-19 21:00:54 -07:00
Alex Forencich
13c1bbe79a Update S10MX QSF 2021-05-19 16:48:58 -07:00
Alex Forencich
bf6fddd1db Add Stratix 10 MX 10G example design 2021-05-18 19:16:30 -07:00
Alex Forencich
7751aba8da Reorganize timing constraints 2021-05-18 16:15:41 -07:00
Alex Forencich
c021d01c26 Update example design readmes 2021-05-04 15:48:12 -07:00
Alex Forencich
6f81c27045 Add readme for Atlys example design 2021-03-16 13:52:01 -07:00
Alex Forencich
c0c2dbce2a Update XDC files 2021-02-06 15:15:34 -08:00
Alex Forencich
a91e2b7e17 Add KC705 SGMII example design 2020-12-30 17:15:34 -08:00
Alex Forencich
5a7fd98413 Add KC705 RGMII example design 2020-12-30 17:15:18 -08:00
Alex Forencich
8a021f5c9b Update KC705 XDC 2020-12-30 16:54:30 -08:00
Alex Forencich
22feb53e1d Update example design readmes 2020-12-30 16:48:37 -08:00
Alex Forencich
77d22bfde0 Rework sim_build output directory, fix default makefile target 2020-12-29 14:47:12 -08:00
Alex Forencich
0359d8d76a Use absolute path to test directory 2020-12-28 19:25:59 -08:00