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5 Commits

Author SHA1 Message Date
Alex Forencich
74f32c6a59 Add missing PHY instance ports 2021-11-02 20:28:26 -07:00
Alex Forencich
6b18e56cb1 Add default_nettype none and resetall directives 2021-10-20 17:29:12 -07:00
Alex Forencich
4fdc6408bc Rework GT instances in Alveo U50 design 2021-10-19 18:14:50 -07:00
Alex Forencich
fd908dd2aa Clean up clock connections 2020-08-06 17:15:38 -07:00
Alex Forencich
f0e130aa48 Add AU50 10G example design 2020-07-17 00:06:32 -07:00