Alex Forencich
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7f0bd00170
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Implement flow control for Stratix 10 shim
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-08-01 13:19:01 -07:00 |
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Alex Forencich
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b1b82a3f2b
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Add pause inputs to TLP mux modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-29 17:16:05 -07:00 |
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Alex Forencich
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103d7abdd9
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Rework framing signal generation
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-03 22:38:16 -07:00 |
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Alex Forencich
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a44f9852c2
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Update Stratix 10 H-tile/L-tile shim to support segments
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-02 23:48:46 -07:00 |
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Alex Forencich
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24dd0af398
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Adjust MSI-X TLP port configuration for single segment, single DWORD operations
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-02 23:41:51 -07:00 |
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Alex Forencich
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a096519fd8
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Fix backpressure feedback bug
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-06-12 23:27:38 -07:00 |
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Alex Forencich
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70dc92c24e
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Rework TLP interface parametrization
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-06-05 13:27:04 -07:00 |
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Alex Forencich
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5208b2844c
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Add MSI-X support to shims
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-06-02 23:35:34 -07:00 |
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Alex Forencich
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1f46987ed8
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Fix typo in Stratix 10 shim
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2022-03-31 23:19:50 -07:00 |
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Alex Forencich
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5c5876ff1d
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Add PCIe interface shim for Stratix 10 GX/SX/TX/MX H-Tile/L-Tile
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2021-11-02 22:29:57 -07:00 |
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