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38 Commits

Author SHA1 Message Date
Alex Forencich
3c995dc8e0 Implement dynamic queue allocation in testbench and driver 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-05-02 21:23:30 -07:00
Alex Forencich
1c7ae0ee73 modules/mqnic: Return pointers directly and use ERR_PTR during object creation 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-30 21:57:32 -07:00
Alex Forencich
66f5b9fcc1 Clean up naming in testbenches, driver, and utils 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-30 21:48:34 -07:00
Alex Forencich
30379cd8a3 Add phase tag to events and completions to avoid queue pointer reads 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-06 20:43:13 -07:00
Alex Forencich
a8feaf2383 Advance TX/RX queue pointers based on completion records instead of MMIO reads 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-04-04 22:12:32 -07:00
Alex Forencich
c5efd8ff0a modules/mqnic: Clean up ring allocation error handling 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-08-15 23:50:36 -07:00
Alex Forencich
693809ab97 modules/mqnic: Use DMA_TO/FROM_DEVICE macros instead of the PCI versions 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-08-06 01:27:19 -07:00
Alex Forencich
d506c9305a Fix pointer updating for correct teardown behavior 2022-01-16 00:04:53 -08:00
Alex Forencich
137a6778da Combine interface control blocks 2022-01-15 21:53:13 -08:00
Alex Forencich
ce21774f06 Register space reorganization 2021-12-29 22:31:46 -08:00
Alex Forencich
11f31c896c Split interface from net_device 2021-12-12 17:28:43 -08:00
Alex Forencich
a53d3acd3f Pass CQ ring instead of index 2021-12-12 14:20:56 -08:00
Alex Forencich
0418fe33a6 Rename ring_index to index 2021-12-12 13:46:09 -08:00
Alex Forencich
bfc8e959bf Split ring buffer allocation from ring creation 2021-12-12 01:52:24 -08:00
Alex Forencich
eeedc179fb Unconditionally deactivate rings 2021-12-12 01:42:14 -08:00
Alex Forencich
630d5a565d Disambiguate rings 2021-12-12 01:37:55 -08:00
Alex Forencich
5e65a384e2 Track ring active state 2021-12-10 21:04:52 -08:00
Alex Forencich
c9de7d24d0 Normalize ring_index parameter 2021-12-10 21:03:46 -08:00
Alex Forencich
ed36f169f9 Rename mqnic_priv.port to mqnic_priv.index 2021-12-10 21:01:51 -08:00
Alex Forencich
c739b05b69 Remove unnecessary priv parameters 2021-12-10 20:59:44 -08:00
Alex Forencich
27c9241a69 Update header comment, add SPDX license identifiers 2021-10-21 14:55:48 -07:00
Alex Forencich
323791cff3 Use __func__ for function name in debug messages 2021-10-21 14:44:05 -07:00
Alex Forencich
79f778d85a Remove out of memory messages; kernel should print stack trace when allocation fails 2021-10-21 14:01:29 -07:00
Alex Forencich
2adaf820b5 More kernel module coding style updates 2021-10-21 13:54:00 -07:00
Alex Forencich
5b49f09baa Fix kernel module coding style 2021-10-08 18:31:53 -07:00
Alex Forencich
220511f661 Use little endian types in hardware structs 2021-01-13 20:19:45 -08:00
Alex Forencich
e60e3a993f Add device object reference in mqnic_dev and clean up references to device object 2020-07-30 19:37:34 -07:00
Alex Forencich
a2ce454c22 Add log_desc_block_size to driver 2020-04-21 14:38:21 -07:00
Alex Forencich
559fc54ea5 Fix RX checksum offloading 2020-03-10 23:39:04 -07:00
Alex Forencich
3d959c2d4f Use configured ring stride 2020-03-10 23:07:30 -07:00
Alex Forencich
65ead3a064 Update receive handling to allocate pages instead of skbs 2020-03-10 23:06:54 -07:00
Alex Forencich
8536b7d2b7 Minor refactor of CQ processing 2020-03-10 22:06:02 -07:00
Alex Forencich
37294142b8 Rework DMA mapping 2020-03-09 17:21:39 -07:00
Alex Forencich
384912e618 Improve sanity checking and error reporting in receive handling 2019-12-04 13:34:56 -08:00
Alex Forencich
e696433ecc Support changing MTU 2019-11-19 13:30:35 -08:00
Alex Forencich
2647f68124 Reset pointers after clearing buffers 2019-11-19 13:12:47 -08:00
Alex Forencich
9341f93b3f Check PTP feature bits 2019-09-12 10:47:26 -07:00
Alex Forencich
6c5b6c99a1 Initial commit of mqnic kernel module 2019-07-17 18:13:51 -07:00