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mirror of https://github.com/corundum/corundum.git synced 2025-01-16 08:12:53 +08:00

1947 Commits

Author SHA1 Message Date
Alex Forencich
782d86a7d1 Remove readme link 2020-12-28 20:43:26 -08:00
Alex Forencich
731fd859ac Add Github Actions regression tests 2020-12-28 20:19:58 -08:00
Alex Forencich
4a98858bea Forward arguments to pytest 2020-12-28 20:19:46 -08:00
Alex Forencich
f47c529122 Add test durations 2020-12-28 19:33:56 -08:00
Alex Forencich
cd12721502 Add cococb testbenches for eth_axis_rx and eth_axis_tx 2020-12-28 19:28:38 -08:00
Alex Forencich
29dc7498d3 Add cocotb MAC testbenches 2020-12-28 19:26:46 -08:00
Alex Forencich
0359d8d76a Use absolute path to test directory 2020-12-28 19:25:59 -08:00
Alex Forencich
3a59569105 Remove extraneous import 2020-12-28 18:53:00 -08:00
Alex Forencich
db58c836f6 Use absolute path to test directory 2020-12-28 18:52:47 -08:00
Alex Forencich
a894af4815 Add tox.ini 2020-12-28 01:12:08 -08:00
Alex Forencich
079d6329cb Migrate example design testbenches to cocotb 2020-12-28 01:11:03 -08:00
Alex Forencich
4d31316fef Remove travis-ci 2020-12-25 02:09:50 -08:00
Alex Forencich
d1fc821c8b Fix simulation startup issue in rgmii_phy_if 2020-12-25 02:03:57 -08:00
Alex Forencich
a78627343d Change default target parameter 2020-12-25 01:48:24 -08:00
Alex Forencich
220e04d1a7 Update example design 2020-12-25 01:47:01 -08:00
Alex Forencich
2a2d8ac966 Fix reg type in VCU108 and VCU118 example designs 2020-12-20 14:22:52 -08:00
Alex Forencich
44bf507e24 Update readme 2020-12-19 14:59:02 -08:00
Alex Forencich
ba50df774d Add Github Actions regression tests 2020-12-19 14:18:05 -08:00
Alex Forencich
8d7f4b52bf Add test durations 2020-12-19 14:17:47 -08:00
Alex Forencich
0e0e9da047 Add tox.ini 2020-12-19 14:11:23 -08:00
Alex Forencich
a0a5ccc0a4 Add cocotb testbenches 2020-12-19 14:10:57 -08:00
Alex Forencich
7c19cb770d Properly name registers, CQ demux bug fix 2020-12-19 14:09:56 -08:00
Alex Forencich
cabad17552 Migrate example design testbenches to cocotb 2020-12-18 22:10:32 -08:00
Alex Forencich
99e91c4d90 Fix pointer handling issue in PCIe AXI DMA write module 2020-12-18 18:37:53 -08:00
Alex Forencich
0c0fdc479b Update testbenches for async send/recv 2020-12-18 17:40:36 -08:00
Alex Forencich
9ab1fb44b1 Convert send/recv to blocking 2020-12-18 16:50:50 -08:00
Alex Forencich
e3fb7d19b2 Fix PCIe config 2020-12-16 14:58:19 -08:00
Alex Forencich
ca7f0131ea Remove unnecessary __init__.py files 2020-12-15 18:59:49 -08:00
Alex Forencich
af07083b1f Update readme 2020-12-15 17:21:22 -08:00
Alex Forencich
26a9d484e8 Add test durations 2020-12-15 17:17:18 -08:00
Alex Forencich
c26bd5ef29 Add Github Actions regresion testing 2020-12-15 17:17:12 -08:00
Alex Forencich
f79b9d79ac Update readme 2020-12-15 17:16:47 -08:00
Alex Forencich
eae1bcdc73 Add tox.ini 2020-12-15 16:54:49 -08:00
Alex Forencich
b5ee772761 Migrate test infrastructure to cocotb 2020-12-15 16:52:20 -08:00
Alex Forencich
3003b3228d Fix backpressure bug in TX checksum module 2020-12-12 21:51:54 -08:00
Alex Forencich
be767f8ee7 Update readme 2020-12-04 16:18:28 -08:00
Alex Forencich
f8ff8a98d5 Remove README symlink 2020-12-04 16:15:32 -08:00
Alex Forencich
face7776d4 Add Github Actions regresion testing 2020-12-04 15:50:56 -08:00
Alex Forencich
bd4e574b36 Add posargs to tox.ini 2020-12-04 15:49:51 -08:00
Alex Forencich
5d2389fd81 Add test durations for pytest-split 2020-12-04 15:41:35 -08:00
Alex Forencich
de53699ed4 Add top-level makefile 2020-12-04 15:41:10 -08:00
Alex Forencich
72f5a2d1cb Add cocotb testbenches 2020-12-04 15:32:14 -08:00
Alex Forencich
8fb827a18b Add tox and pytest configuration 2020-12-04 15:30:48 -08:00
Alex Forencich
3d2364e19e Add wrapper generators 2020-12-04 15:21:14 -08:00
Alex Forencich
d834e49587 Move wire declarations 2020-12-03 17:37:53 -08:00
Alex Forencich
1f9aa62639 Add wrapper generator for axis_broadcast 2020-12-03 17:31:11 -08:00
Alex Forencich
3240be1dd4 Add pipeline registers, floorplanning constraints for AU250 100G design 2020-12-03 15:08:57 -08:00
Alex Forencich
909ccae151 Properly synchronize bad FCS status output 2020-12-01 14:01:15 -08:00
Alex Forencich
91edbbf3dc Rename port and interface modules 2020-11-26 15:05:59 -08:00
Alex Forencich
e4c4222fa9 Use wlast instead of awlen to detect end of write burst 2020-11-15 11:26:39 -08:00