Alex Forencich
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fa77fe54f3
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Rework GT instances in ExaNIC X25 design
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2021-10-18 00:32:37 -07:00 |
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Alex Forencich
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4aa672f8f3
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Update example designs
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2021-10-17 20:20:26 -07:00 |
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Alex Forencich
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97182ccf4e
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Update vivado.mk
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2021-06-23 20:07:29 -07:00 |
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Alex Forencich
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7751aba8da
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Reorganize timing constraints
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2021-05-18 16:15:41 -07:00 |
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Alex Forencich
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c021d01c26
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Update example design readmes
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2021-05-04 15:48:12 -07:00 |
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Alex Forencich
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c0c2dbce2a
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Update XDC files
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2021-02-06 15:15:34 -08:00 |
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Alex Forencich
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77d22bfde0
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Rework sim_build output directory, fix default makefile target
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2020-12-29 14:47:12 -08:00 |
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Alex Forencich
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0359d8d76a
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Use absolute path to test directory
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2020-12-28 19:25:59 -08:00 |
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Alex Forencich
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079d6329cb
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Migrate example design testbenches to cocotb
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2020-12-28 01:11:03 -08:00 |
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Alex Forencich
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ed7136a095
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Update flash programming configuration for ExaNIC X10 and X25
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2020-10-03 15:27:30 -07:00 |
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Alex Forencich
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6aba3a741a
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Update makefiles
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2020-08-06 17:19:11 -07:00 |
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Alex Forencich
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fd908dd2aa
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Clean up clock connections
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2020-08-06 17:15:38 -07:00 |
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Alex Forencich
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a27c04a949
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Convert to TCL IP
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2020-07-01 19:43:26 -07:00 |
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Alex Forencich
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27ed447005
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Use common sync_reset module files
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2020-03-27 18:27:45 -07:00 |
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Alex Forencich
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a55c354924
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Parametrize Ethernet frame parsing
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2020-02-21 21:37:57 -08:00 |
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Alex Forencich
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4ac6d6803b
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Parametrize ARP components
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2020-02-20 16:49:47 -08:00 |
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Alex Forencich
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b34f294900
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Add ExaNIC X25 10G example design
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2019-10-30 17:14:27 -07:00 |
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