Alex Forencich
|
448fa8eb4c
|
Use SPDX
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2023-06-26 11:44:57 -07:00 |
|
Alex Forencich
|
c5003d0c6d
|
fpga/mqnic: Select advanced mode for Xilinx PCIe IP core config to access MSI-X settings
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2022-12-03 15:35:16 -08:00 |
|
Alex Forencich
|
5e52a52f5e
|
fpga/mqnic: Add MIGs and HBM controllers for most boards
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2022-10-12 19:00:49 -07:00 |
|
Alex Forencich
|
729c3a0458
|
Update for PCIe shim changes, enable TLP straddling on US/US+ devices, and use 256 tags on US+ devices
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2022-07-08 22:07:18 -07:00 |
|
Alex Forencich
|
21b0f014a5
|
Switch to MSI-X
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2022-06-02 23:58:29 -07:00 |
|
Alex Forencich
|
b10ff8b4a7
|
Unified 10G/25G design for AU250
|
2022-03-14 21:39:13 -07:00 |
|