1
0
mirror of https://github.com/corundum/corundum.git synced 2025-01-16 08:12:53 +08:00

1016 Commits

Author SHA1 Message Date
Alex Forencich
451acd3af5 Parametrize queue RAM width 2019-08-11 15:15:55 -07:00
Alex Forencich
1e06d7cca7 Clean up pipeline parameters 2019-08-11 09:55:10 -07:00
Alex Forencich
46fe4bbd97 Remove extraneous code 2019-08-11 00:34:50 -07:00
Alex Forencich
f6244afdd2 Add symlink 2019-08-11 00:33:22 -07:00
Alex Forencich
2f27b5f0f1 Update timespec 2019-08-08 21:40:02 -07:00
Alex Forencich
59606f2cbf Pull I2C driver code into separate module 2019-08-08 21:31:29 -07:00
Alex Forencich
3e0c23f24f Update readme 2019-08-08 12:47:19 -07:00
Alex Forencich
afbec29b52 merged changes in pcie 2019-08-04 00:39:35 -07:00
Alex Forencich
564178a05a Automatically select port upstream of device when necessary 2019-08-04 00:38:38 -07:00
Alex Forencich
13835c18a1 merged changes in pcie 2019-08-03 23:33:15 -07:00
Alex Forencich
97500d10f6 Improved link speed control script 2019-08-03 23:32:02 -07:00
Alex Forencich
f1024f72cb merged changes in eth 2019-07-29 18:56:36 -07:00
Alex Forencich
cdfa01e2aa Add checksum verification methods 2019-07-29 18:54:37 -07:00
Alex Forencich
bfef06ca0e Separate UDP pseudo header checksum computation 2019-07-29 18:53:32 -07:00
Alex Forencich
2fbbfb05f9 Parametrize channel assignments 2019-07-28 16:02:54 -07:00
Alex Forencich
0709e4e09f Remove extraneous parameter 2019-07-28 16:01:05 -07:00
Alex Forencich
26f6774182 Parameter updates and documentation 2019-07-27 23:47:46 -07:00
Alex Forencich
772e01c95c Add VCU118 mqnic_tdma design 2019-07-25 20:24:32 -07:00
Alex Forencich
089a46c811 Add VCU118 mqnic design 2019-07-25 20:21:11 -07:00
Alex Forencich
5b8898f2bc Add VCU108 mqnic_tdma design 2019-07-25 17:44:13 -07:00
Alex Forencich
958aec8e8c Add VCU108 mqnic design 2019-07-25 17:05:56 -07:00
Alex Forencich
f518aec219 Include instance names in error messages 2019-07-25 16:38:54 -07:00
Alex Forencich
562e713837 Remove extraneous connections 2019-07-25 15:34:32 -07:00
Alex Forencich
90900f144a merged changes in axi 2019-07-24 18:19:15 -07:00
Alex Forencich
8547057f32 Fix to enable M_COUNT of 1 2019-07-24 18:18:44 -07:00
Alex Forencich
e809912456 merged changes in eth 2019-07-24 18:02:17 -07:00
Alex Forencich
db297ce725 merged changes in pcie 2019-07-24 18:02:14 -07:00
Alex Forencich
574aeeef63 merged changes in axi 2019-07-24 18:02:10 -07:00
Alex Forencich
c75f29c648 Add parameter documentation 2019-07-24 18:01:13 -07:00
Alex Forencich
7c500e6b6e Update axis_arb_mux 2019-07-24 17:52:53 -07:00
Alex Forencich
62dbc043e2 Add parameter documentation 2019-07-24 17:49:48 -07:00
Alex Forencich
f32d7d0dec merged changes in axis 2019-07-24 15:39:00 -07:00
Alex Forencich
76c805e416 Fix more indexing bugs 2019-07-24 15:38:49 -07:00
Alex Forencich
8179a32b7d Pass all parameters in testbenches 2019-07-24 15:26:49 -07:00
Alex Forencich
1085d651a0 merged changes in axis 2019-07-24 15:23:00 -07:00
Alex Forencich
23b9490fac Fix switch bug 2019-07-24 15:22:35 -07:00
Alex Forencich
099bb0e8b5 merged changes in axis 2019-07-24 14:26:48 -07:00
Alex Forencich
8f36c4a216 Update priority encoder 2019-07-24 14:23:04 -07:00
Alex Forencich
d694a67190 Update priority encoder 2019-07-24 14:22:47 -07:00
Alex Forencich
5f454d6c05 Update axis_switch to support default routing configurations 2019-07-24 14:20:07 -07:00
Alex Forencich
c5f44c70d1 Add parameter documentation 2019-07-24 13:54:21 -07:00
Alex Forencich
c091f7ed76 Add switch wrapper generator 2019-07-24 13:46:33 -07:00
Alex Forencich
b4cebd8394 Fix crosspoint wrapper generator 2019-07-24 13:44:43 -07:00
Alex Forencich
c759ff03b7 Fix default parameter 2019-07-24 11:07:17 -07:00
Alex Forencich
0a16bb1299 Fix parametrization 2019-07-24 01:45:18 -07:00
Alex Forencich
5c736fc094 More hardware IDs 2019-07-23 22:30:26 -07:00
Alex Forencich
987e11f6c0 Query regs size via info ioctl 2019-07-23 18:43:58 -07:00
Alex Forencich
5ea84cb7b5 Add info ioctl 2019-07-23 18:43:04 -07:00
Alex Forencich
a862711a0a Update perout to use timespec handling code 2019-07-22 18:06:17 -07:00
Alex Forencich
c44ffe2f92 Add timespec handling code 2019-07-22 18:00:55 -07:00