Alex Forencich
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451acd3af5
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Parametrize queue RAM width
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2019-08-11 15:15:55 -07:00 |
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Alex Forencich
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1e06d7cca7
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Clean up pipeline parameters
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2019-08-11 09:55:10 -07:00 |
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Alex Forencich
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46fe4bbd97
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Remove extraneous code
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2019-08-11 00:34:50 -07:00 |
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Alex Forencich
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f6244afdd2
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Add symlink
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2019-08-11 00:33:22 -07:00 |
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Alex Forencich
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2f27b5f0f1
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Update timespec
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2019-08-08 21:40:02 -07:00 |
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Alex Forencich
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59606f2cbf
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Pull I2C driver code into separate module
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2019-08-08 21:31:29 -07:00 |
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Alex Forencich
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3e0c23f24f
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Update readme
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2019-08-08 12:47:19 -07:00 |
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Alex Forencich
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afbec29b52
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merged changes in pcie
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2019-08-04 00:39:35 -07:00 |
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Alex Forencich
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564178a05a
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Automatically select port upstream of device when necessary
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2019-08-04 00:38:38 -07:00 |
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Alex Forencich
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13835c18a1
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merged changes in pcie
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2019-08-03 23:33:15 -07:00 |
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Alex Forencich
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97500d10f6
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Improved link speed control script
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2019-08-03 23:32:02 -07:00 |
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Alex Forencich
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f1024f72cb
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merged changes in eth
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2019-07-29 18:56:36 -07:00 |
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Alex Forencich
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cdfa01e2aa
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Add checksum verification methods
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2019-07-29 18:54:37 -07:00 |
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Alex Forencich
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bfef06ca0e
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Separate UDP pseudo header checksum computation
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2019-07-29 18:53:32 -07:00 |
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Alex Forencich
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2fbbfb05f9
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Parametrize channel assignments
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2019-07-28 16:02:54 -07:00 |
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Alex Forencich
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0709e4e09f
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Remove extraneous parameter
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2019-07-28 16:01:05 -07:00 |
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Alex Forencich
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26f6774182
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Parameter updates and documentation
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2019-07-27 23:47:46 -07:00 |
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Alex Forencich
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772e01c95c
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Add VCU118 mqnic_tdma design
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2019-07-25 20:24:32 -07:00 |
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Alex Forencich
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089a46c811
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Add VCU118 mqnic design
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2019-07-25 20:21:11 -07:00 |
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Alex Forencich
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5b8898f2bc
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Add VCU108 mqnic_tdma design
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2019-07-25 17:44:13 -07:00 |
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Alex Forencich
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958aec8e8c
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Add VCU108 mqnic design
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2019-07-25 17:05:56 -07:00 |
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Alex Forencich
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f518aec219
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Include instance names in error messages
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2019-07-25 16:38:54 -07:00 |
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Alex Forencich
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562e713837
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Remove extraneous connections
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2019-07-25 15:34:32 -07:00 |
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Alex Forencich
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90900f144a
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merged changes in axi
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2019-07-24 18:19:15 -07:00 |
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Alex Forencich
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8547057f32
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Fix to enable M_COUNT of 1
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2019-07-24 18:18:44 -07:00 |
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Alex Forencich
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e809912456
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merged changes in eth
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2019-07-24 18:02:17 -07:00 |
|
Alex Forencich
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db297ce725
|
merged changes in pcie
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2019-07-24 18:02:14 -07:00 |
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Alex Forencich
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574aeeef63
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merged changes in axi
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2019-07-24 18:02:10 -07:00 |
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Alex Forencich
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c75f29c648
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Add parameter documentation
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2019-07-24 18:01:13 -07:00 |
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Alex Forencich
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7c500e6b6e
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Update axis_arb_mux
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2019-07-24 17:52:53 -07:00 |
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Alex Forencich
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62dbc043e2
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Add parameter documentation
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2019-07-24 17:49:48 -07:00 |
|
Alex Forencich
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f32d7d0dec
|
merged changes in axis
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2019-07-24 15:39:00 -07:00 |
|
Alex Forencich
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76c805e416
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Fix more indexing bugs
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2019-07-24 15:38:49 -07:00 |
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Alex Forencich
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8179a32b7d
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Pass all parameters in testbenches
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2019-07-24 15:26:49 -07:00 |
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Alex Forencich
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1085d651a0
|
merged changes in axis
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2019-07-24 15:23:00 -07:00 |
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Alex Forencich
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23b9490fac
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Fix switch bug
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2019-07-24 15:22:35 -07:00 |
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Alex Forencich
|
099bb0e8b5
|
merged changes in axis
|
2019-07-24 14:26:48 -07:00 |
|
Alex Forencich
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8f36c4a216
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Update priority encoder
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2019-07-24 14:23:04 -07:00 |
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Alex Forencich
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d694a67190
|
Update priority encoder
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2019-07-24 14:22:47 -07:00 |
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Alex Forencich
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5f454d6c05
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Update axis_switch to support default routing configurations
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2019-07-24 14:20:07 -07:00 |
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Alex Forencich
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c5f44c70d1
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Add parameter documentation
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2019-07-24 13:54:21 -07:00 |
|
Alex Forencich
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c091f7ed76
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Add switch wrapper generator
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2019-07-24 13:46:33 -07:00 |
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Alex Forencich
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b4cebd8394
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Fix crosspoint wrapper generator
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2019-07-24 13:44:43 -07:00 |
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Alex Forencich
|
c759ff03b7
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Fix default parameter
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2019-07-24 11:07:17 -07:00 |
|
Alex Forencich
|
0a16bb1299
|
Fix parametrization
|
2019-07-24 01:45:18 -07:00 |
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Alex Forencich
|
5c736fc094
|
More hardware IDs
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2019-07-23 22:30:26 -07:00 |
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Alex Forencich
|
987e11f6c0
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Query regs size via info ioctl
|
2019-07-23 18:43:58 -07:00 |
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Alex Forencich
|
5ea84cb7b5
|
Add info ioctl
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2019-07-23 18:43:04 -07:00 |
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Alex Forencich
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a862711a0a
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Update perout to use timespec handling code
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2019-07-22 18:06:17 -07:00 |
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Alex Forencich
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c44ffe2f92
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Add timespec handling code
|
2019-07-22 18:00:55 -07:00 |
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