Alex Forencich
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ed4a26e2cb
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Update Vivado makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-07-13 18:45:01 -07:00 |
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Alex Forencich
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beaf1c6fbf
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fpga/mqnic/ZCU106/fpga_zynqmp: Add support for Ubuntu for ZCU106 MPSoC
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-06-02 01:53:24 -07:00 |
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Alex Forencich
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554369b33b
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fpga/mqnic: Update makefile path handling
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-03-24 00:39:45 -07:00 |
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Alex Forencich
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5f1e74b0e1
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Add PROJECT variable, remove multiple stem matches
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-10-11 13:33:09 -07:00 |
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Alex Forencich
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7017e7d49b
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Explicitly set top module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-10-11 12:29:01 -07:00 |
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Alex Forencich
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ceb6a9ca06
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Update clean target
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-10-11 12:26:39 -07:00 |
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Alex Forencich
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9c98f12392
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Write debug probes file alongside bit file
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-10-10 23:37:54 -07:00 |
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Alex Forencich
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9628401780
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Normalize output file location
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-10-10 21:47:53 -07:00 |
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Andreas Braun
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35517037e6
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ZCU106/: Add design based on ZynqMP PS as host system, Vivado v2021.1
Signed-off-by: Andreas Braun <andreas.braun@missinglinkelectronics.com>
Signed-off-by: Joachim Förster <joachim.foerster@missinglinkelectronics.com>
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2022-03-31 17:22:27 +02:00 |
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