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2,830 Commits 1 Branch 0 Tags
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761 Commits

Author SHA1 Message Date
Alex Forencich
cbd9d0dfc6 Expose port and scheduler block counts in IF control block; update driver model, driver, and userspace tools to handle scheduler blocks separately from ports 2022-03-28 17:23:27 -07:00
Alex Forencich
09128df360 Add SCHED_PER_IF parameter to split scheduler count from port count 2022-03-28 15:20:33 -07:00
Alex Forencich
dfae34ed25 Pass through PTP pipelining settings 2022-03-28 00:50:29 -07:00
Alex Forencich
ad8ffef2a0 merged changes in eth 2022-03-27 23:49:57 -07:00
Alex Forencich
e95c132045 Route PCIe user reset through BUFG 2022-03-25 01:26:29 -07:00
Alex Forencich
6f197c7cb4 Add PHY instances to Ethernet pblocks 2022-03-24 21:30:55 -07:00
Ulrich Langenbach
984a58684c fix partial initialisation of memory 
the fixed issue has been introduced in 0560f98e799d741d62522e61bf23321fc3f2880b
 2022-03-24 15:50:25 -07:00
Alex Forencich
8aa2185bfb Fix MCS file addresses for main bitstream 2022-03-20 22:52:14 -07:00
Alex Forencich
b83270c953 Fix rev file numbering for fallback bitstream generation 2022-03-20 22:50:37 -07:00
Alex Forencich
d2f5a89b5f Update build images script for ubuntu 2022-03-17 17:46:06 -07:00
Alex Forencich
056f78716a Add pipeline registers 2022-03-17 15:39:44 -07:00
Alex Forencich
0e15a7a16b Avoid critical warning from placement constraints when configured with a single interface 2022-03-17 15:39:13 -07:00
Alex Forencich
6cb5297e28 Fix TDMA BER pipeline register 2022-03-17 13:28:41 -07:00
Alex Forencich
869e7e70d4 Add Ethernet interface placement constraints for AU250 2022-03-17 00:51:14 -07:00
Alex Forencich
059d9b5e37 Add Ethernet interface placement constraints for AU200 2022-03-17 00:51:05 -07:00
Alex Forencich
28558449f6 Add Ethernet interface placement constraints for VCU1525 2022-03-17 00:48:52 -07:00
Alex Forencich
0928f56a45 Add Ethernet interface placement constraints for VCU118 2022-03-17 00:48:44 -07:00
Alex Forencich
cb44b2ee60 merged changes in eth 2022-03-16 21:09:16 -07:00
Alex Forencich
a61ac12962 Add Ethernet interface placement constraints for ADM-PCIE-9V3 2022-03-16 21:08:01 -07:00
Alex Forencich
e317439843 Add Ethernet interface placement constraints for fb2CG@KU15P 2022-03-16 21:07:53 -07:00
Alex Forencich
fdabde6d0f Remove deprecated assignments 2022-03-15 17:52:12 -07:00
Alex Forencich
1291d7b1b7 Add pipeline registers to TDMA BER modules 2022-03-15 17:40:27 -07:00
Alex Forencich
25421b8994 Update placement constraints 2022-03-15 15:28:43 -07:00
Alex Forencich
39691759aa Unified 10G/25G design for VCU118 2022-03-14 21:40:29 -07:00
Alex Forencich
202f407686 Unified 10G/25G design for VCU1525 2022-03-14 21:39:55 -07:00
Alex Forencich
b10ff8b4a7 Unified 10G/25G design for AU250 2022-03-14 21:39:13 -07:00
Alex Forencich
74be2d9b57 Unified 10G/25G design for AU200 2022-03-14 21:38:31 -07:00
Alex Forencich
2024ac60ec Unified 10G/25G design for AU280 2022-03-14 21:37:40 -07:00
Alex Forencich
67bd69a8d7 Unified 10G/25G design for AU50 2022-03-14 21:36:30 -07:00
Alex Forencich
e9d52516fb Unified 10G/25G design for ExaNIC X25 2022-03-14 19:12:58 -07:00
Alex Forencich
1fadd2f361 Unified 10G/25G design for ADM-PCIE-9V3 2022-03-14 18:50:40 -07:00
Alex Forencich
e5c6f7cf01 Unified 10G/25G design for fb2CG@KU15P 2022-03-14 17:44:31 -07:00
Alex Forencich
8168469ec8 Update config.tcl 2022-03-14 14:45:38 -07:00
Alex Forencich
8fc832bbd2 Parametrization update 2022-03-04 15:37:49 -08:00
Alex Forencich
8e2e6c6026 Fix testbench 2022-03-04 00:01:33 -08:00
Alex Forencich
d9e79c9923 Rename cores to match transceiver type 2022-03-03 22:41:34 -08:00
Alex Forencich
29f97dc663 Update ZCU106 to use new wrapper 2022-03-03 22:26:06 -08:00
Alex Forencich
a373753d6e Update VCU108 to use new wrapper 2022-03-03 22:23:43 -08:00
Alex Forencich
3ef15abcef Update VCU118 to use new wrapper 2022-03-03 22:14:18 -08:00
Alex Forencich
59eac3d2e5 Update ExaNIC X10 to use new wrapper 2022-03-03 20:38:55 -08:00
Alex Forencich
16111eb7a8 Update AU50 to use new wrapper 2022-03-03 20:15:06 -08:00
Alex Forencich
8fff75577a Update AU280 to use new wrapper 2022-03-03 19:53:49 -08:00
Alex Forencich
3472efd219 Update AU250 to use new wrapper 2022-03-03 17:49:08 -08:00
Alex Forencich
f8950897bc Update AU200 to use new wrapper 2022-03-03 17:34:42 -08:00
Alex Forencich
180ff33c7e Update VCU1525 to use new wrapper 2022-03-03 17:03:24 -08:00
Alex Forencich
37a4c41636 Update ADM-PCIE-9V3 to use new wrapper 2022-03-03 15:40:36 -08:00
Alex Forencich
7bbc777c98 Update ExaNIC X25 to use new wrapper 2022-03-03 15:32:17 -08:00
Alex Forencich
8851b3b1ad Add build automation scripts 2022-03-02 23:20:59 -08:00
Alex Forencich
2cc3dbd5cc Update DRP info 2022-03-02 23:12:02 -08:00
Alex Forencich
a54b673d54 Explicitly set equalizer mode 2022-03-02 23:11:49 -08:00