Alex Forencich
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5d298e8465
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Update ubuntu version in CI
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-17 16:20:22 -08:00 |
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Alex Forencich
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24c74b3003
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merged changes in pcie
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2023-02-17 16:20:00 -08:00 |
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Alex Forencich
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e7953da0c0
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merged changes in eth
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2023-02-17 16:19:50 -08:00 |
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Alex Forencich
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93ceea327e
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merged changes in axi
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2023-02-17 16:19:45 -08:00 |
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Alex Forencich
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00c200f881
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Remove recursively-expanded macros for module parameters in makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-17 16:18:44 -08:00 |
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Alex Forencich
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1ad973f7a7
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Update ubuntu version in CI
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-17 16:05:56 -08:00 |
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Alex Forencich
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5f15cdeb24
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Update ubuntu version in CI
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-17 16:05:02 -08:00 |
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Alex Forencich
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c65161e696
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Remove recursively-expanded macros for module parameters in makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-17 16:04:16 -08:00 |
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Alex Forencich
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db818b2f53
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merged changes in axis
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2023-02-17 16:03:28 -08:00 |
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Alex Forencich
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c6c83a7c68
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Remove recursively-expanded macros for module parameters in makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-17 15:58:34 -08:00 |
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Alex Forencich
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960a2eab61
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Remove recursively-expanded macros for module parameters in makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-17 15:56:40 -08:00 |
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Alex Forencich
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86e87c7c3b
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Fix PTP clock offset ns field width
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-17 15:47:47 -08:00 |
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Alex Forencich
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de3ec216a0
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Fix min address width checks in AXI lite components
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-13 13:18:24 -08:00 |
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Alex Forencich
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0cba4e1917
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Update ubuntu version in CI
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-13 13:03:26 -08:00 |
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Alex Forencich
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5f1ad94041
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Update ubuntu version in CI
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-13 13:03:06 -08:00 |
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Alex Forencich
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5f8fb0cabc
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Minor documentation corrections
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-01 18:53:18 -08:00 |
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Alex Forencich
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b0fd1f3f3b
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Add documentation on RX queue map register block
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-01 18:50:08 -08:00 |
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Alex Forencich
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c396da2ebc
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Add documentation on clock info register block
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-01 18:49:52 -08:00 |
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Alex Forencich
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e4764bc600
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Add documentation on app info register block
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-01 18:49:32 -08:00 |
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Alex Forencich
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96bb163038
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Add documentation on port-level register blocks
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-01 18:49:15 -08:00 |
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Alex Forencich
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d3eb4ee473
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Update documentation on operations on the RX and TX paths through the application section
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-02-01 17:22:16 -08:00 |
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Alex Forencich
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bc2757dde9
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Cache clock edge events
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-31 16:22:05 -08:00 |
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Alex Forencich
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e872c6c749
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Rework parameter handling in testbench makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-29 23:20:44 -08:00 |
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Alex Forencich
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90c703464d
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merged changes in pcie
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2023-01-29 23:00:36 -08:00 |
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Alex Forencich
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d1ee73fea4
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merged changes in eth
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2023-01-29 23:00:30 -08:00 |
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Alex Forencich
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2158c4ef9c
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merged changes in axi
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2023-01-29 23:00:23 -08:00 |
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Alex Forencich
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9c5c6e6edf
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Rework parameter handling in example design makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-29 22:56:53 -08:00 |
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Alex Forencich
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5de1bc0df1
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Rework parameter handling in testbench makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-29 22:31:21 -08:00 |
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Alex Forencich
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e10a7ae88e
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Rework parameter handling in testbench makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-29 22:12:16 -08:00 |
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Alex Forencich
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ab0c382123
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Rework parameter handling in makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-29 21:03:16 -08:00 |
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Alex Forencich
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c4f94773fa
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merged changes in axis
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2023-01-29 21:03:02 -08:00 |
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Alex Forencich
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b81e323a6d
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Rework parameter handling in testbench makefiles
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-29 20:53:11 -08:00 |
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Alex Forencich
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0c951a4e5a
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Split some long-running tests
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-26 21:55:58 -08:00 |
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Alex Forencich
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73728d1994
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Adjust testbench timeouts
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-26 18:47:15 -08:00 |
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Alex Forencich
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8673038288
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Update CI configuration
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-26 16:43:01 -08:00 |
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Alex Forencich
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28916a56cd
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Update CI configuration
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-26 16:41:36 -08:00 |
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Alex Forencich
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eda769d167
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Update CI configuration
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-26 13:00:03 -08:00 |
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Alex Forencich
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7b2c99e731
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Fix unaligned operation handling in AXI to AXIL adapter
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-26 12:58:39 -08:00 |
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Alex Forencich
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211f674603
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Fix unaligned operation handling in AXI adapter
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-26 12:58:03 -08:00 |
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Alex Forencich
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3dc4ca92f6
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Improve unaligned operation handling in AXIL adapter
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-25 21:08:32 -08:00 |
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Alex Forencich
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3ac119305d
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Update CI configuration
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-25 19:10:50 -08:00 |
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Alex Forencich
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e6d8ed7992
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Update CI configuration
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-25 19:10:09 -08:00 |
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Alex Forencich
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57803eeeb8
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Remove deprecated assignments
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-24 15:07:45 -08:00 |
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Alex Forencich
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5b859b08a0
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Use false path constraints for status signals that change infrequently
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-17 14:25:30 -08:00 |
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Alex Forencich
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f521fb6435
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Update timing constraints to handle clocks from OOC IP that are not constrained during synthesis
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-17 13:40:36 -08:00 |
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Alex Forencich
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79431bf221
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merged changes in eth
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2023-01-15 18:26:16 -08:00 |
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Alex Forencich
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450765187e
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Update lfsr.v
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-15 12:36:03 -08:00 |
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Alex Forencich
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cb1dc8fb15
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Optimize FCS verification in 10G/25G MAC modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-13 15:47:30 -08:00 |
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Alex Forencich
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7a0e88ffea
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Update vivado.mk
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-13 14:57:46 -08:00 |
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Alex Forencich
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f3d5e74527
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Add RV901T example design
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-01-01 22:03:14 -08:00 |
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