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1,028 Commits 1 Branch 0 Tags
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14 Commits

Author SHA1 Message Date
Alex Forencich
5f066b9fcd Adjust ExaNIC board ID to match original PCIe ID 2019-08-19 22:04:10 -07:00
Alex Forencich
94c8dabad6 Rewrite scheduler 2019-08-13 00:45:01 -07:00
Alex Forencich
80f06e1fcc Update testbenches 2019-08-13 00:39:28 -07:00
Alex Forencich
2fbbfb05f9 Parametrize channel assignments 2019-07-28 16:02:54 -07:00
Alex Forencich
26f6774182 Parameter updates and documentation 2019-07-27 23:47:46 -07:00
Alex Forencich
089a46c811 Add VCU118 mqnic design 2019-07-25 20:21:11 -07:00
Alex Forencich
958aec8e8c Add VCU108 mqnic design 2019-07-25 17:05:56 -07:00
Alex Forencich
0a16bb1299 Fix parametrization 2019-07-24 01:45:18 -07:00
Alex Forencich
a6c4b8b1b7 Change board IDs 2019-07-21 15:27:01 -07:00
Alex Forencich
ea7ccd182e Move MAC out of port module 2019-07-19 23:29:03 -07:00
Alex Forencich
9de2101cdc Update ExaNIC X10 testbenches 2019-07-19 18:01:24 -07:00
Alex Forencich
eb92578699 Update FIFO instances 2019-07-19 16:17:36 -07:00
Alex Forencich
750112ff06 Add ADM-PCIE-9V3 mqnic design 2019-07-19 15:39:40 -07:00
Alex Forencich
1df012a8d4 Add ExaNIC X10 design 2019-07-17 16:57:04 -07:00