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11 Commits

Author SHA1 Message Date
Alex Forencich
627ac359d5 Add layer 2 ingress/egress modules 2022-02-13 23:09:41 -08:00
Alex Forencich
b7bc240aa6 Add JTAG and GPIO passthroughs to application section 2022-01-27 23:06:05 -08:00
Alex Forencich
335a5e890b Initial implementation of shared interface datapath 2021-12-31 14:33:31 -08:00
Alex Forencich
ce21774f06 Register space reorganization 2021-12-29 22:31:46 -08:00
Alex Forencich
7a43618e3c Use start_soon instead of fork 2021-12-10 20:43:21 -08:00
Alex Forencich
8674bd1e69 Update app testbench 2021-11-30 15:36:38 -08:00
Alex Forencich
8f887005e5 Update Ethernet interface configuration detection in testbenches 2021-11-22 17:04:50 -08:00
Alex Forencich
74f4c6fc2d Support using separate clock for PTP timestamps on RX path 2021-11-18 23:56:51 -08:00
Alex Forencich
5bf9de656c Update testbenches 2021-11-17 18:08:40 -08:00
Alex Forencich
7ac4797336 Add default_nettype none and resetall directives 2021-10-20 21:53:39 -07:00
Alex Forencich
d24c53a2ad Add application section 2021-09-09 16:01:26 -07:00