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Author SHA1 Message Date
Alex Forencich
93e2769269 Make 64-bit-only states no-ops for other interface widths 2021-02-14 15:17:28 -08:00
Alex Forencich
6ab66ed347 Fix signal name in xdc 2021-02-14 15:08:13 -08:00
Alex Forencich
a78674c06a Refactor TLP header and tuser computation 2021-02-14 11:16:25 -08:00
Alex Forencich
93496729f3 Update testbench 2021-02-12 16:59:13 -08:00
Alex Forencich
fb1d64e710 Add pipeline stage to dma_if_pcie_us_wr 2021-02-12 16:58:35 -08:00
Alex Forencich
6d98a7c0e6 Ensure output FIFOs use distributed RAM 2021-02-11 00:14:36 -08:00
Alex Forencich
5f7697178b Remove await ReadOnly 2021-02-10 18:42:32 -08:00
Alex Forencich
ba1b0ef20b Add output FIFO to write DMA interface module 2021-02-10 17:29:17 -08:00
Alex Forencich
f76ed26503 Add output FIFO to AXI stream source DMA client 2021-02-10 17:28:08 -08:00
Alex Forencich
c6d8983fcd Add wr_done output to DMA RAMs 2021-02-07 23:47:46 -08:00
Alex Forencich
633b47ef7f Update XDC files 2021-02-06 17:14:26 -08:00
Alex Forencich
c0c2dbce2a Update XDC files 2021-02-06 15:15:34 -08:00
Alex Forencich
ea093b0126 More XDC cleanup 2021-02-06 15:15:05 -08:00
Alex Forencich
46149bef3f Update ZCU106 XDC 2021-02-05 22:22:25 -08:00
Alex Forencich
24d179dd4a VCU118 XDC cleanup 2021-02-05 22:14:00 -08:00
Alex Forencich
0c1acadbfa Enable termination on LVDS clock input 2021-02-05 22:12:59 -08:00
Alex Forencich
1d7dc703b5 Add cfgmclk timing constraints, rework reset connections 2021-02-05 18:00:56 -08:00
Alex Forencich
b16fe8f7e7 More XDC clean up, add IO delay constraints for low speed IO 2021-02-05 16:08:23 -08:00
Alex Forencich
816689035c Add placement constraints for ADM-PCIE-9V3 2021-02-05 16:06:56 -08:00
Alex Forencich
9e27d45959 Add IPROG for ADM-PCIE-9V3 2021-02-05 16:06:34 -08:00
Alex Forencich
7c8abe261b Add driver support for Alveo BMC 2021-02-01 21:55:07 -08:00
Alex Forencich
8274d0b713 Minor refactor 2021-02-01 21:53:55 -08:00
Alex Forencich
9f970b1556 Use ETH_ALEN 2021-02-01 21:53:38 -08:00
Alex Forencich
6b142d36c2 Pull board-specific code into mqnic_board.c and refactor I2C code 2021-02-01 20:10:48 -08:00
Alex Forencich
53df02d22c Update makefile 2021-02-01 00:00:56 -08:00
Alex Forencich
df32217dc8 Use MAC list instead of base MAC for more flexibility 2021-01-31 22:25:24 -08:00
Alex Forencich
85d9ec7a87 Add mqnic-bmc tool 2021-01-31 21:32:57 -08:00
Alex Forencich
89d7042aeb Add CMS IP to all Alveo designs 2021-01-31 14:17:49 -08:00
Alex Forencich
722bd929b8 Placement updates 2021-01-31 12:48:49 -08:00
Alex Forencich
151ed7e179 Add extra reset registers 2021-01-31 11:10:03 -08:00
Alex Forencich
1248ca1a2e Add power budget to Alveo XDC files 2021-01-29 15:44:15 -08:00
Alex Forencich
4b28f527da Update readme 2021-01-16 13:43:42 -08:00
Alex Forencich
02c2f6d2b6 Update github actions 2021-01-16 13:42:04 -08:00
Alex Forencich
5d91fde42a Update github actions 2021-01-16 13:40:35 -08:00
Alex Forencich
eeb04acdd0 Update github actions 2021-01-16 13:39:56 -08:00
Alex Forencich
ac69ddfa22 Update github actions 2021-01-16 13:38:10 -08:00
Pekka Enberg
57809dad90 mqnic_i2c: Fix device_attach() error handling 
If the device_attach() function fails, make sure "client" is free'd and
that the create_i2c_client() function returns NULL to signal an error to
callers.

Signed-off-by: Pekka Enberg <penberg@iki.fi>
 2021-01-16 13:18:23 -08:00
Alex Forencich
2a24722d7f Add placement constraints for ADM-PCIE-9V3 2021-01-15 22:36:46 -08:00
Alex Forencich
972e41e433 Update placement constraints 2021-01-14 22:06:24 -08:00
Alex Forencich
93400bf05d Update placement constraints for AU250 100G design 2021-01-14 17:19:40 -08:00
Alex Forencich
7ede1d38e6 Update placement constraints for VCU118 100G design 2021-01-14 16:50:21 -08:00
Alex Forencich
6476ad3fd0 Separate file for placement constraints 2021-01-14 14:42:58 -08:00
Alex Forencich
9accebffb9 Add pipeline registers, floorplanning constraints for AU200 100G design 2021-01-13 22:56:10 -08:00
Alex Forencich
9d97bf5a70 Add placement constraints for AU200 10G design 2021-01-13 22:14:18 -08:00
Alex Forencich
de76c82186 Add placement constraints for VCU118 10G mqnic_tdma design 2021-01-13 21:50:32 -08:00
Alex Forencich
b2ce3e4602 Add placement constraints for VCU118 10G design 2021-01-13 21:49:55 -08:00
Alex Forencich
7d0cafeb18 Add placement constraints for AU250 10G design 2021-01-13 21:29:53 -08:00
Alex Forencich
96b3514207 Add placement constraints for VCU1525 10G design 2021-01-13 21:28:03 -08:00
Alex Forencich
7dba8c162c Add placement constraints for AU280 10G design 2021-01-13 21:09:25 -08:00
Alex Forencich
8f8fbf33a8 Update placement constraints for AU280 100G design 2021-01-13 20:56:18 -08:00