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6 Commits

Author SHA1 Message Date
Alex Forencich
aaeeb05ac0 Fix PHY configuration connections 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-08-25 00:09:38 -07:00
Alex Forencich
fa05d4ff3c Add TX and RX enable inputs to MACs 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-08-24 01:24:33 -07:00
Alex Forencich
20c542051d Use cfg prefix for configuration signals 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-08-22 17:14:52 -07:00
Alex Forencich
d6fc68947b Procedural generation of testbench drivers 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-07-27 20:25:08 -07:00
Alex Forencich
50b6f53387 Update testbench clock frequencies 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-07-15 01:53:31 -07:00
Alex Forencich
026a302c1c Use unified 10G/25G design for ExaNIC X25 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-07-13 20:45:47 -07:00