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10 Commits

Author SHA1 Message Date
Alex Forencich
f66f4d7cce Update VCU118 designs 2021-09-13 00:09:23 -07:00
Alex Forencich
3e489fde27 Fix instance name 2021-08-04 12:37:13 -07:00
Alex Forencich
0b65a1271a Use new PCIe DMA modules 2021-08-04 01:20:57 -07:00
Alex Forencich
1bb5d8ab56 Add PTP support at 100G on VCU118 2021-04-01 18:02:58 -07:00
Alex Forencich
2779087de9 Constrain DMA muxes to same SLR 2021-02-23 02:17:10 -08:00
Alex Forencich
ceebb9f20e Add more PCIe-related components to PCIe pblock 2021-02-23 00:55:05 -08:00
Alex Forencich
722bd929b8 Placement updates 2021-01-31 12:48:49 -08:00
Alex Forencich
972e41e433 Update placement constraints 2021-01-14 22:06:24 -08:00
Alex Forencich
7ede1d38e6 Update placement constraints for VCU118 100G design 2021-01-14 16:50:21 -08:00
Alex Forencich
6476ad3fd0 Separate file for placement constraints 2021-01-14 14:42:58 -08:00