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14 Commits

Author SHA1 Message Date
Alex Forencich
7823b916bf Implement MARK_WHEN_FULL option in FIFOs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-08-16 12:50:12 -07:00
Alex Forencich
62c2148c8f Add pause functionality to FIFO modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-08-14 16:57:16 -07:00
Alex Forencich
31bac4e21f Reorganize FIFO adapter wrappers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-08-14 16:56:33 -07:00
Alex Forencich
10da93fec4 Add depth status outputs to FIFOs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2023-07-26 20:02:43 -07:00
Alex Forencich
9c3409f9d7 Add option for output FIFO to improve pipelining and RAM inference for large FIFOs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2022-11-01 19:02:53 -07:00
Alex Forencich
a0f46801a1 Replace OUTPUT_PIPELINE with RAM_PIPELINE
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2022-11-01 14:40:58 -07:00
Alex Forencich
073d50d9dc Round up default KEEP_WIDTH settings when DATA_WIDTH is not a multiple of 8 2022-03-30 16:02:17 -07:00
Alex Forencich
2972a1fa81 Add default_nettype none and resetall directives 2021-10-20 15:33:38 -07:00
Alex Forencich
92681fad8c Add DROP_OVERSIZE_FRAME parameter 2021-08-25 22:56:22 -07:00
Alex Forencich
ede73b434a Add PIPELINE_OUTPUT parameter to FIFO adapter modules 2020-09-07 00:22:55 -07:00
Alex Forencich
ce00df8de1 Include instance names in error messages 2019-07-25 16:30:10 -07:00
Alex Forencich
c5f44c70d1 Add parameter documentation 2019-07-24 13:54:21 -07:00
Alex Forencich
69de6fd2a4 Convert FIFOs to use DEPTH parameter instead of ADDR_WIDTH 2019-07-18 11:27:25 -07:00
Alex Forencich
8e969aa14c Add FIFO/width adapter wrapper modules 2019-04-26 18:38:25 -07:00