Alex Forencich
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d0cc106783
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fpga: Remove redundant RX_RSS_ENABLE parameter
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-10-13 17:10:25 -07:00 |
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Alex Forencich
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01df80df86
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fpga/mqnic: Disable MIGs by default
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-10-12 23:57:27 -07:00 |
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Alex Forencich
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5e52a52f5e
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fpga/mqnic: Add MIGs and HBM controllers for most boards
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-10-12 19:00:49 -07:00 |
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Alex Forencich
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eb990643f2
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fpga/mqnic: various minor cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-10-12 17:12:07 -07:00 |
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Alex Forencich
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1486da601f
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fpga: Add clock period parameters
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-09-04 12:03:35 -07:00 |
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Alex Forencich
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81648cf85b
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fpga/mqnic: Clean up PCIe DMA IF flow control connections
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-08-03 23:04:05 -07:00 |
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Alex Forencich
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0afe9be906
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fpga/mqnic/VCU108: Update VCU108 design to support 25G
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-26 23:26:11 -07:00 |
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