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11 Commits

Author SHA1 Message Date
Alex Forencich
c5af0f726a fpga/mqnic: Use arrays for QSFP pins 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2023-08-28 12:21:09 -07:00
Alex Forencich
5f9e33e8ab fpga/mqnic: Enable overtemp shutdown on all boards 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-12-06 15:23:23 -08:00
Alex Forencich
3d993e4479 Use CMAC wrapper in 100G mqnic design for Alveo U250 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-11-10 16:00:45 -08:00
Alex Forencich
5e52a52f5e fpga/mqnic: Add MIGs and HBM controllers for most boards 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-10-12 19:00:49 -07:00
Alex Forencich
b16fe8f7e7 More XDC clean up, add IO delay constraints for low speed IO 2021-02-05 16:08:23 -08:00
Alex Forencich
89d7042aeb Add CMS IP to all Alveo designs 2021-01-31 14:17:49 -08:00
Alex Forencich
1248ca1a2e Add power budget to Alveo XDC files 2021-01-29 15:44:15 -08:00
Alex Forencich
6476ad3fd0 Separate file for placement constraints 2021-01-14 14:42:58 -08:00
Alex Forencich
3240be1dd4 Add pipeline registers, floorplanning constraints for AU250 100G design 2020-12-03 15:08:57 -08:00
Alex Forencich
5ddca32315 Fix flash settings 2020-09-29 17:32:06 -07:00
Alex Forencich
72afcc44fe Add 100G mqnic design for Alveo U250 2020-09-22 01:01:23 -07:00