Alex Forencich
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9834f8365c
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Rework resource management in testbenches, driver, and utils
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2023-05-01 22:04:43 -07:00 |
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Alex Forencich
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ede33bb23e
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lib/mqnic: Add statistics counter read support to userspace library
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-11-23 17:38:18 -08:00 |
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Alex Forencich
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3daeb18d5f
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lib/mqnic: Refactor clock info register block code in userspace library
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-11-23 17:37:45 -08:00 |
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Alex Forencich
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4dd35181dc
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lib/mqnic: add register interface abstraction
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-07-28 17:52:19 -07:00 |
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Alex Forencich
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c2fea3a616
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Add port register blocks with support for PHY link status reporting
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-05-04 09:03:37 -07:00 |
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Alex Forencich
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e6c18cfb68
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Move fpga_id into library
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-19 13:36:02 -07:00 |
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Alex Forencich
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730ccf3a5b
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lib/mqnic: Reorganize library code
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-19 13:13:53 -07:00 |
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Alex Forencich
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a1cd110074
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Peel off common software components into a static library
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2022-04-19 01:45:01 -07:00 |
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