22 Commits

Author	SHA1	Message	Date
Alex Forencich	9b5a8cf24a	Rewrite resets ... Signed-off-by: Alex Forencich <alex@alexforencich.com>	2022-05-15 17:39:44 -07:00
Alex Forencich	7d8b5560b7	Fix backpressure bug	2021-12-31 22:58:38 -08:00
Alex Forencich	6b18e56cb1	Add default_nettype none and resetall directives	2021-10-20 17:29:12 -07:00
Alex Forencich	eb1f38a749	More critical path optimizations	2019-06-19 15:06:55 -07:00
Alex Forencich	1d3554c37e	Rework pointer handling to improve timing	2019-06-16 23:53:26 -07:00
Alex Forencich	7ec836baf6	IP header checksum optimizations	2019-06-16 22:01:11 -07:00
Alex Forencich	b17966f73d	store_last_word timing optimization	2019-06-16 20:01:08 -07:00
Alex Forencich	55bf44117b	shift_axis_extra_cycle timing optimization	2019-06-16 19:57:52 -07:00
Alex Forencich	6b1b36ded6	Assert header ready earlier if possible	2018-11-07 23:10:07 -08:00
Alex Forencich	d2fedc4134	Rename ports	2018-11-07 22:35:06 -08:00
Alex Forencich	25d1b373cc	Use don't care bits	2018-06-14 15:20:20 -07:00
Alex Forencich	0fd157964a	Happy new year	2018-02-26 12:50:51 -08:00
Alex Forencich	9b2ac9dfc1	Happy new year	2017-05-18 13:47:45 -07:00
Alex Forencich	9c01e114b4	Happy new year	2016-01-05 00:34:32 -08:00
Alex Forencich	a98dfce099	Update output registers, remove extraneous resets, fix constant widths	2015-11-09 23:50:34 -08:00
Alex Forencich	cc5fead04d	Convert to synchronous resets	2015-10-09 22:36:58 -07:00
Alex Forencich	8aa5ec5118	Improve ip_eth_rx_64 module timing performance	2015-05-08 21:06:33 -07:00
Alex Forencich	51b5335318	Remove z from default states for FSM inference	2015-03-09 02:38:39 -07:00
Alex Forencich	6b4dd02946	Resolve multiple driver issue	2015-02-28 00:43:27 -08:00
Alex Forencich	867b799ecd	Rework IP datapath modules to separate output register	2014-10-28 01:00:52 -07:00
Alex Forencich	8191b38e7a	Move header valid assign to top	2014-09-25 16:25:37 -07:00
Alex Forencich	c6236bc647	Add 64-bit datapath version of IP modules	2014-09-25 00:40:48 -07:00