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1321 Commits

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Author SHA1 Message Date
Alex Forencich
a00589e5a3 Timing optimizations 2020-02-27 15:24:24 -08:00
Alex Forencich
2b14ab2555 Update cmac_pad to pad frames to 60 bytes 2020-02-26 13:36:19 -08:00
Alex Forencich
7ebdceedf2 merged changes in pcie 2020-02-26 13:34:53 -08:00
Alex Forencich
bd0482fc96 Update script for sysfs changes 2020-02-26 12:21:36 -08:00
Alex Forencich
bfe537e614 Driver update for linux kernel API change 2020-02-25 12:36:43 -08:00
Alex Forencich
fd4a6db850 Update readme 2020-02-23 17:19:50 -08:00
Alex Forencich
1443c04ed3 Add missing reset 2020-02-23 17:18:59 -08:00
Alex Forencich
a55c354924 Parametrize Ethernet frame parsing 2020-02-21 21:37:57 -08:00
Alex Forencich
7994db90b1 Set initial tkeep state in testbenches 2020-02-21 15:18:21 -08:00
Alex Forencich
8618b24dea Force tkeep output high if KEEP_ENABLE is false 2020-02-21 14:30:13 -08:00
Alex Forencich
4ac6d6803b Parametrize ARP components 2020-02-20 16:49:47 -08:00
Alex Forencich
f9915b2f31 Refactor 2020-02-19 21:32:00 -08:00
Alex Forencich
406a3d69d1 Rework read handling 2020-02-19 21:24:15 -08:00
Alex Forencich
2876235a72 Throughput optimizations 2020-02-19 18:15:58 -08:00
Alex Forencich
b2e8e2d7a7 Update readme 2020-02-18 01:06:36 -08:00
Alex Forencich
52d1117753 Add AXI stream RAM switch module and testbenches 2020-02-18 01:06:14 -08:00
Alex Forencich
8d087ecc92 Consolidate example driver code 2020-02-13 13:16:05 -08:00
Alex Forencich
7977c3003b Support accessing card via sysfs without driver loaded 2020-02-03 17:05:21 -08:00
Alex Forencich
c3eba353fb Add checks for out-of-range pointers 2020-02-03 17:02:05 -08:00
Alex Forencich
fe8fdab002 Improve error handling 2020-02-03 17:01:00 -08:00
Alex Forencich
239b7ddd0b Add missing QSFP lpmode connections 2020-02-03 13:52:29 -08:00
Alex Forencich
63fcadaf0f Add missing refclk control connections 2020-01-30 12:22:44 -08:00
Alex Forencich
2f595be70e merged changes in pcie 2020-01-24 13:52:45 -08:00
Alex Forencich
ec2ceb8e56 Timing optimizations 2020-01-24 13:51:30 -08:00
Alex Forencich
4b25e6e9c9 Update readme 2020-01-17 10:27:56 -08:00
Alex Forencich
70450a4d89 Add 100G mqnic design for VCU1525 2020-01-16 23:36:32 -08:00
Alex Forencich
26b7b67b9b Add 10G mqnic design for VCU1525 2020-01-16 23:35:00 -08:00
Alex Forencich
73bb9a68c1 Add VCU1525 HW ID 2020-01-16 17:43:20 -08:00
Alex Forencich
815705f413 Add VCU1525 10G example design 2020-01-15 23:14:08 -08:00
Alex Forencich
3bad28d626 Add VCU1525 AXI example design 2020-01-15 22:43:33 -08:00
Alex Forencich
e7cadac773 Remove extraneous files 2019-12-31 22:35:25 -08:00
Alex Forencich
c9f36937ba Update readme 2019-12-31 22:02:10 -08:00
Alex Forencich
81842e3c50 Add 100G mqnic design for Alpha Data board 2019-12-31 21:43:39 -08:00
Alex Forencich
217217b45e Remove unused table fields 2019-12-30 22:02:22 -08:00
Alex Forencich
1a739b326d Dump PHC and TDMA registers 2019-12-30 21:03:00 -08:00
Alex Forencich
f6da532b97 Read PHC stride 2019-12-30 21:02:24 -08:00
Alex Forencich
8aeea9e110 Add perout offset and stride defines 2019-12-30 20:45:56 -08:00
Alex Forencich
f642bb7f7e Reserve packet data slot early and release on dequeue fail 2019-12-30 17:49:42 -08:00
Alex Forencich
91a538ff5f Change driver queue count limits 2019-12-29 23:40:07 -08:00
Alex Forencich
3737d85206 Use correct queue counts 2019-12-29 17:07:04 -08:00
Alex Forencich
a501f33c09 Update parameters 2019-12-29 16:46:25 -08:00
Alex Forencich
0955a4101f Fix signal widths 2019-12-29 16:45:32 -08:00
Alex Forencich
3690fdeb7d Pull out pipeline parameters 2019-12-28 01:16:16 -08:00
Alex Forencich
58200e9851 Fix testbench 2019-12-28 01:15:40 -08:00
Alex Forencich
db9e1df1fa Update pipelining to enable URAM inference 2019-12-28 01:13:57 -08:00
Alex Forencich
f97ff4407b Change driver model max packet size 2019-12-23 14:41:52 -08:00
Alex Forencich
cbde1abaf9 Add CMAC pad module 2019-12-23 14:40:51 -08:00
Alex Forencich
96bb5feead merged changes in pcie 2019-12-23 14:39:18 -08:00
Alex Forencich
db56c938bf Replace generate with assign 2019-12-17 00:09:38 -08:00
Alex Forencich
45a33b8293 Fix scheduler bug 2019-12-16 14:13:01 -08:00