Alex Forencich
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f2f19f7174
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Update terminology, use byte_lanes instead of byte_width
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2021-09-25 22:52:19 -07:00 |
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Alex Forencich
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bc8715decc
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Hold read completions until pending writes complete
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2021-09-25 00:46:55 -07:00 |
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Alex Forencich
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c8dd50b051
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pcie_print_link_status was added in kernel version 4.17
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2021-09-24 17:05:35 -07:00 |
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Alex Forencich
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39fbc194fd
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Update makefiles
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2021-09-20 18:22:47 -07:00 |
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Alex Forencich
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52ba4c40e2
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Update readme
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2021-09-13 20:40:39 -07:00 |
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Alex Forencich
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1bee717bc8
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Remove old TDMA variants
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2021-09-13 17:20:44 -07:00 |
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Alex Forencich
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cc6348653d
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Add TDMA variants
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2021-09-13 17:19:50 -07:00 |
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Alex Forencich
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620791e562
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Add TDMA testbench
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2021-09-13 17:11:39 -07:00 |
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Alex Forencich
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df9417454e
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Improve messages
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2021-09-13 16:18:11 -07:00 |
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Alex Forencich
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4704115974
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Allow boot and reset even if flashing is not supported
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2021-09-13 16:17:55 -07:00 |
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Alex Forencich
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3d64e5fc30
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Retry hot reset a few times if necessary
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2021-09-13 13:51:36 -07:00 |
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Alex Forencich
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5435db91cb
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Ensure that boot/reset are skipped if flash update fails
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2021-09-13 13:51:06 -07:00 |
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Alex Forencich
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dfe0dd38f0
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Print out mismatches when verify fails
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2021-09-13 13:50:27 -07:00 |
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Alex Forencich
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9da588cf73
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Add dummy reads for timing
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2021-09-13 13:49:29 -07:00 |
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Alex Forencich
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e8c28e00cd
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Update tox configuration
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2021-09-13 13:02:17 -07:00 |
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Alex Forencich
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f25cfa0982
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Update tox configuration
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2021-09-13 13:00:03 -07:00 |
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Alex Forencich
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875b664c13
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Update offset
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2021-09-13 12:54:35 -07:00 |
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Alex Forencich
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b0bb8d628a
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Update tox configuration
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2021-09-13 01:38:16 -07:00 |
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Alex Forencich
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b1596751cf
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Update NetFPGA SUME design
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2021-09-13 01:30:36 -07:00 |
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Alex Forencich
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f66f4d7cce
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Update VCU118 designs
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2021-09-13 00:09:23 -07:00 |
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Alex Forencich
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bfea350194
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Update VCU108 design
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2021-09-12 23:17:50 -07:00 |
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Alex Forencich
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58a2dbd734
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Update ZCU106 design
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2021-09-12 23:17:01 -07:00 |
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Alex Forencich
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3f8becb186
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Update ExaNIC X10 design
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2021-09-12 21:56:33 -07:00 |
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Alex Forencich
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a18eced17f
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Update ExaNIC X25 design
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2021-09-12 12:40:39 -07:00 |
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Alex Forencich
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49a2b6462f
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Update ADM-PCIE-9V3 designs
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2021-09-11 23:22:08 -07:00 |
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Alex Forencich
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200ef77b09
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Update VCU1525 designs
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2021-09-11 20:07:32 -07:00 |
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Alex Forencich
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d7e9e91644
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Fix FIFO size parameter defaults
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2021-09-11 17:42:24 -07:00 |
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Alex Forencich
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26fdddb3ae
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Update Alveo U250 designs
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2021-09-11 01:27:23 -07:00 |
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Alex Forencich
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ec89492d24
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Fix control register addressing bug
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2021-09-11 00:49:48 -07:00 |
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Alex Forencich
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ed418f101a
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Update Alveo U200 designs
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2021-09-10 23:40:53 -07:00 |
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Alex Forencich
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9b1188860b
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Update Alveo U50 designs
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2021-09-10 19:07:55 -07:00 |
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Alex Forencich
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079ad5ec37
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Add pblock for 10G MACs
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2021-09-10 18:52:46 -07:00 |
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Alex Forencich
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9ee5463b92
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Remove blank line
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2021-09-10 18:52:22 -07:00 |
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Alex Forencich
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6a44a59b2c
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Move LED assignments
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2021-09-10 10:53:41 -07:00 |
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Alex Forencich
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ada43236d9
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Fix alignment
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2021-09-09 23:17:52 -07:00 |
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Alex Forencich
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c56f6d717b
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Fix IDs
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2021-09-09 22:05:27 -07:00 |
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Alex Forencich
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c92dbfe7ed
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Update file lists
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2021-09-09 21:52:16 -07:00 |
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Alex Forencich
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fcf4bc007f
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Update Alveo U280 designs
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2021-09-09 18:09:08 -07:00 |
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Alex Forencich
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2442ff65c5
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Support application and RAM bars
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2021-09-09 17:50:44 -07:00 |
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Alex Forencich
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d0976f193b
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Use correct type
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2021-09-09 17:49:11 -07:00 |
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Alex Forencich
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d24c53a2ad
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Add application section
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2021-09-09 16:01:26 -07:00 |
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Alex Forencich
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371717b854
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Add block names
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2021-09-09 14:12:41 -07:00 |
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Alex Forencich
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b097aa5c9e
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merged changes in pcie
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2021-09-09 01:00:10 -07:00 |
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Alex Forencich
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b131b2ebbf
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Rework DMA desc status demux to fix X issue at t=0
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2021-09-09 00:58:48 -07:00 |
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Alex Forencich
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97e3daa36c
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Extract information from design instead of env vars
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2021-09-08 16:44:58 -07:00 |
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Alex Forencich
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c920272e84
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Use interface address widths directly instead of BAR size parameters
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2021-09-08 14:51:18 -07:00 |
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Alex Forencich
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3cbb4a9506
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merged changes in pcie
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2021-09-08 10:05:40 -07:00 |
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Alex Forencich
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f566df2c66
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Add TLP mux and demux modules
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2021-09-08 10:04:38 -07:00 |
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Alex Forencich
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cef144e376
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Expose DMA_LEN_WIDTH and DMA_TAG_WIDTH parameters
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2021-09-08 00:18:11 -07:00 |
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Alex Forencich
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c00a53155d
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Fix alignment
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2021-09-07 01:38:09 -07:00 |
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