61 Commits

Author	SHA1	Message	Date
Alex Forencich	a644d6dd3f	Update Vivado makefiles	2021-03-01 23:05:37 -08:00
Alex Forencich	d0b19efce5	Reconcile PCIe changes	2021-03-01 00:25:15 -08:00
Alex Forencich	a3c104f7dd	Connect write done signals	2021-02-24 15:07:26 -08:00
Alex Forencich	ceebb9f20e	Add more PCIe-related components to PCIe pblock	2021-02-23 00:55:05 -08:00
Alex Forencich	ea093b0126	More XDC cleanup	2021-02-06 15:15:05 -08:00
Alex Forencich	0c1acadbfa	Enable termination on LVDS clock input	2021-02-05 22:12:59 -08:00
Alex Forencich	b16fe8f7e7	More XDC clean up, add IO delay constraints for low speed IO	2021-02-05 16:08:23 -08:00
Alex Forencich	151ed7e179	Add extra reset registers	2021-01-31 11:10:03 -08:00
Alex Forencich	2a24722d7f	Add placement constraints for ADM-PCIE-9V3	2021-01-15 22:36:46 -08:00
Alex Forencich	c0c2f933c0	Rework sim_build output directory, fix default makefile target	2020-12-29 17:28:53 -08:00
Alex Forencich	0c0fdc479b	Update testbenches for async send/recv	2020-12-18 17:40:36 -08:00
Alex Forencich	b5ee772761	Migrate test infrastructure to cocotb	2020-12-15 16:52:20 -08:00
Alex Forencich	91edbbf3dc	Rename port and interface modules	2020-11-26 15:05:59 -08:00
Alex Forencich	53f4275ea2	Add output registers for I2C interface to improve timing	2020-10-13 23:52:52 -07:00
Alex Forencich	ac4859d88e	Fix user_clk_frequency setting in testbenches	2020-10-12 23:07:43 -07:00
Alex Forencich	d6810db7f5	Add extra output register for flash interface to improve routability and timing	2020-10-08 19:22:28 -07:00
Alex Forencich	ba5aa5a82b	Fallback bitstream generation and flashing support	2020-10-04 00:40:59 -07:00
Alex Forencich	0f59f97f64	Add IPROG for ADM-PCIE-9V3	2020-10-03 21:07:54 -07:00
Alex Forencich	96f015d905	Update LED connections	2020-09-29 00:38:04 -07:00
Alex Forencich	70b7082fb6	Implement new control registers	2020-09-19 17:25:58 -07:00
Alex Forencich	c8f5bb235c	Remove extraneous clock connections	2020-08-19 18:33:41 -07:00
Alex Forencich	e54eb685b3	Update makefiles	2020-08-06 18:43:47 -07:00
Alex Forencich	77b9cace47	Update BAR configuration in testbenches	2020-07-28 19:01:53 -07:00
Alex Forencich	ffd04d2bb0	Cleanup	2020-07-28 19:00:33 -07:00
Alex Forencich	d449be8fc5	Convert to 64 bit BARs	2020-07-24 16:54:57 -07:00
Alex Forencich	e230fecb23	XDC clean up	2020-07-13 23:58:39 -07:00
Alex Forencich	f99736d4f5	Convert to TCL IP	2020-07-11 20:07:13 -07:00
Alex Forencich	50af74aa88	Change QUEUE_LOG_SIZE_WIDTH to LOG_QUEUE_SIZE_WIDTH	2020-04-20 18:43:26 -07:00
Alex Forencich	9e3e80661c	Use common sync_reset module	2020-03-27 23:53:05 -07:00
Alex Forencich	e7cadac773	Remove extraneous files	2019-12-31 22:35:25 -08:00
Alex Forencich	81842e3c50	Add 100G mqnic design for Alpha Data board	2019-12-31 21:43:39 -08:00
Alex Forencich	a501f33c09	Update parameters	2019-12-29 16:46:25 -08:00
Alex Forencich	0955a4101f	Fix signal widths	2019-12-29 16:45:32 -08:00
Alex Forencich	7a68abbb84	Split control and data descriptor paths to DMA engine	2019-12-13 14:15:25 -08:00
Alex Forencich	88e31d0ccb	Connect PCIe credit interface to DMA cores	2019-12-13 12:41:50 -08:00
Alex Forencich	6270278c75	Add RSS support	2019-12-06 14:15:16 -08:00
Alex Forencich	0e7a91d927	Connect RQ sequence number	2019-12-03 18:19:17 -08:00
Alex Forencich	489506e4c0	Add FPGA ID register	2019-11-17 12:46:27 -08:00
Alex Forencich	445f80e6f2	Connect QSPI flash on Alpha Data board	2019-11-17 01:01:52 -08:00
Alex Forencich	33be402b16	Update widths	2019-11-14 00:02:10 -08:00
Alex Forencich	e43c011e33	Update testbenches	2019-11-05 18:31:41 -08:00
Alex Forencich	736321641f	Parametrize addressing	2019-10-31 23:24:42 -07:00
Alex Forencich	6473786a4c	Add 25G mqnic design for Alpha Data board	2019-10-18 03:26:46 -07:00
Alex Forencich	02cc2c7377	Use PCIe gen 3 x16	2019-10-17 19:02:46 -07:00
Alex Forencich	8fa7e40507	Use new DMA subsystem	2019-10-17 16:02:14 -07:00
Alex Forencich	9ab0d50c0a	Add PCIe interface tuser width parameters	2019-10-05 13:56:24 -07:00
Alex Forencich	9a1a58f608	Add PCIe interface tuser width parameters	2019-10-04 16:51:07 -07:00
Alex Forencich	2c46513837	Update designs	2019-09-23 18:21:54 -07:00
Alex Forencich	835abf9412	Remove pcie_us_axi_master instances and corresponding BAR	2019-09-19 17:31:59 -07:00
Alex Forencich	132d44cd90	Increase crossbar threads count	2019-09-11 18:06:14 -07:00