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564 Commits 1 Branch 0 Tags
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9 Commits

Author SHA1 Message Date
Alex Forencich
23705eb873 Update PCIe TLP demux to handle segments 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-07-02 23:39:38 -07:00
Alex Forencich
056500dbf4 Avoid zero-width replication 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-06-13 00:52:29 -07:00
Alex Forencich
4818f2595c Fix initial reg value 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-06-13 00:27:44 -07:00
Alex Forencich
df32016724 Add sequence number ports to TLP mux and demux modules 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-06-05 17:34:12 -07:00
Alex Forencich
70dc92c24e Rework TLP interface parametrization 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-06-05 13:27:04 -07:00
Alex Forencich
ae1f4a9a22 Rewrite early ready condition 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-05-15 19:25:30 -07:00
Alex Forencich
8cdb780ee3 Rewrite resets 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-05-15 17:57:26 -07:00
Alex Forencich
90959b8795 Add default_nettype none and resetall directives 2021-10-20 17:49:30 -07:00
Alex Forencich
f566df2c66 Add TLP mux and demux modules 2021-09-08 10:04:38 -07:00