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61 Commits

Author SHA1 Message Date
Alex Forencich
c2fea3a616 Add port register blocks with support for PHY link status reporting 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-05-04 09:03:37 -07:00
Alex Forencich
e4de3c2fb5 modules/mqnic: Consistent naming of driver functions and structs 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-24 23:01:15 -07:00
Alex Forencich
cc9d445005 Move driver-specific code out of mqnic_hw.h 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-24 22:54:04 -07:00
Alex Forencich
2bd8350276 Add RX queue mapping module 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-23 00:12:22 -07:00
Alex Forencich
65a986cc89 modules/mqnic: Add support for extension kernel modules using the auxiliary bus 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-21 13:18:00 -07:00
Alex Forencich
7f8bbe30de Add application ID 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-21 13:15:45 -07:00
Alex Forencich
dbe0dc70ee modules/mqnic: Remove obsolete PHC entries 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
 2022-04-20 21:29:56 -07:00
Joachim Foerster
26c70bbb8a modules/mqnic/: Add platform driver support 
Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
 2022-04-07 17:14:25 +02:00
Alex Forencich
cbd9d0dfc6 Expose port and scheduler block counts in IF control block; update driver model, driver, and userspace tools to handle scheduler blocks separately from ports 2022-03-28 17:23:27 -07:00
Alex Forencich
2babcdd16e Fix indentation 2022-03-26 00:18:07 -07:00
Alex Forencich
137a6778da Combine interface control blocks 2022-01-15 21:53:13 -08:00
Alex Forencich
ce21774f06 Register space reorganization 2021-12-29 22:31:46 -08:00
Alex Forencich
2091ef8c42 Fix dev_port assignment 2021-12-29 14:29:55 -08:00
Joachim Foerster
508b4cf39b modules/mqnic/: Make number of allocated queue entries configurable via module parameters 
This may be complemented or replaced by making use of the appropriate ethtool
API in the future, of course.

Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
 2021-12-15 23:29:02 -08:00
Alex Forencich
11f31c896c Split interface from net_device 2021-12-12 17:28:43 -08:00
Alex Forencich
a53d3acd3f Pass CQ ring instead of index 2021-12-12 14:20:56 -08:00
Alex Forencich
56706beefc Pass EQ ring instead of index 2021-12-12 13:58:26 -08:00
Alex Forencich
0418fe33a6 Rename ring_index to index 2021-12-12 13:46:09 -08:00
Alex Forencich
413238f81c Refactor interrupt handling 2021-12-12 13:34:33 -08:00
Alex Forencich
3c6f80b80c Add dev references to CQ and EQ rings 2021-12-12 01:53:38 -08:00
Alex Forencich
bfc8e959bf Split ring buffer allocation from ring creation 2021-12-12 01:52:24 -08:00
Alex Forencich
292d805450 Rename mqnic_priv.ports to mqnic_priv.port 2021-12-12 01:38:45 -08:00
Alex Forencich
ddeb8bad94 Use atomic notifier chain for interrupt handling 2021-12-10 21:05:31 -08:00
Alex Forencich
5e65a384e2 Track ring active state 2021-12-10 21:04:52 -08:00
Alex Forencich
c9de7d24d0 Normalize ring_index parameter 2021-12-10 21:03:46 -08:00
Alex Forencich
32a82929c6 Normalize create/destroy methods 2021-12-10 21:02:57 -08:00
Alex Forencich
ed36f169f9 Rename mqnic_priv.port to mqnic_priv.index 2021-12-10 21:01:51 -08:00
Alex Forencich
c739b05b69 Remove unnecessary priv parameters 2021-12-10 20:59:44 -08:00
Alex Forencich
aef59c65ec Use kernel types 2021-10-21 22:19:01 -07:00
Alex Forencich
27c9241a69 Update header comment, add SPDX license identifiers 2021-10-21 14:55:48 -07:00
Alex Forencich
2adaf820b5 More kernel module coding style updates 2021-10-21 13:54:00 -07:00
Alex Forencich
5b49f09baa Fix kernel module coding style 2021-10-08 18:31:53 -07:00
Alex Forencich
2442ff65c5 Support application and RAM bars 2021-09-09 17:50:44 -07:00
Alex Forencich
d0976f193b Use correct type 2021-09-09 17:49:11 -07:00
Alex Forencich
6b142d36c2 Pull board-specific code into mqnic_board.c and refactor I2C code 2021-02-01 20:10:48 -08:00
Alex Forencich
df32217dc8 Use MAC list instead of base MAC for more flexibility 2021-01-31 22:25:24 -08:00
Alex Forencich
945b2d3206 Add ethtool support for reading module EEPROMs 2020-09-19 17:25:58 -07:00
Alex Forencich
639cc1d02b Register I2C muxes and clients for NetFPGA SUME, VCU108, VCU118, VCU1525, and ZCU106 2020-09-19 17:25:58 -07:00
Alex Forencich
a46cb33b69 Add mqnic_create_i2c_adapter method 2020-09-19 17:25:58 -07:00
Alex Forencich
b6e5216ab4 Add IRQ mapping 2020-08-17 23:53:31 -07:00
Alex Forencich
907bb68a99 Use misc device properly 2020-07-31 00:47:43 -07:00
Alex Forencich
e60e3a993f Add device object reference in mqnic_dev and clean up references to device object 2020-07-30 19:37:34 -07:00
Alex Forencich
6d26adf916 Add MTU registers to driver 2020-05-01 21:54:44 -07:00
Alex Forencich
b62a47df8e Determine max desc block size and compute ring stride 2020-04-21 17:51:02 -07:00
Alex Forencich
a4108ecbf9 Implement TX scatter/gather in driver 2020-04-21 17:18:58 -07:00
Alex Forencich
a2ce454c22 Add log_desc_block_size to driver 2020-04-21 14:38:21 -07:00
Alex Forencich
65ead3a064 Update receive handling to allocate pages instead of skbs 2020-03-10 23:06:54 -07:00
Alex Forencich
8536b7d2b7 Minor refactor of CQ processing 2020-03-10 22:06:02 -07:00
Alex Forencich
37294142b8 Rework DMA mapping 2020-03-09 17:21:39 -07:00
Alex Forencich
6270278c75 Add RSS support 2019-12-06 14:15:16 -08:00